Home Power management Gate drivers Half-bridge drivers

UCC27223

ACTIVE

High-Efficiency Predictive synchronous buck driver with dead time control

Product details

Bootstrap supply voltage (max) (V) 20 Power switch MOSFET Input supply voltage (min) (V) -0.3 Input supply voltage (max) (V) 20 Peak output current (A) 3 Operating temperature range (°C) -40 to 105 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.06 Rise time (ns) 17 Fall time (ns) 17 Iq (mA) 220 Input threshold TTL Channel input logic TTL Switch node voltage (V) 0 Features Dead time control, Enable, Soft switching, Synchronous Rectification Driver configuration Inverting, Noninverting
Bootstrap supply voltage (max) (V) 20 Power switch MOSFET Input supply voltage (min) (V) -0.3 Input supply voltage (max) (V) 20 Peak output current (A) 3 Operating temperature range (°C) -40 to 105 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.06 Rise time (ns) 17 Fall time (ns) 17 Iq (mA) 220 Input threshold TTL Channel input logic TTL Switch node voltage (V) 0 Features Dead time control, Enable, Soft switching, Synchronous Rectification Driver configuration Inverting, Noninverting
HTSSOP (PWP) 14 32 mm² 5 x 6.4
  • Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
  • Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
  • 12-V or 5-V Input Operation
  • 3.3-V Input Operation With Availability of 12-V Bus Bias
  • High-Side and Low-Side ±3-A Dual Drivers
  • On-Board 6.5-V Gate Drive Regulator
  • ±3-A TrueDrive™ Gate Drives for High Current Delivery at MOSFET Miller Thresholds
  • Automatically Adjusts for Changing Operating Conditions
  • Thermally Enhanced 14-Pin PowerPAD™ HTSSOP Package Minimizes Board Area and Junction Temperature Rise
  • APPLICATIONS
    • Multiphase Converters in Combination With the TPS40090
    • Non-Isolated 3.3-V, 5-V and 12-V Input dc-to-dc Converters for Processor Power, General Computer, Telecom and Datacom Applications

Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.

  • Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
  • Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
  • 12-V or 5-V Input Operation
  • 3.3-V Input Operation With Availability of 12-V Bus Bias
  • High-Side and Low-Side ±3-A Dual Drivers
  • On-Board 6.5-V Gate Drive Regulator
  • ±3-A TrueDrive™ Gate Drives for High Current Delivery at MOSFET Miller Thresholds
  • Automatically Adjusts for Changing Operating Conditions
  • Thermally Enhanced 14-Pin PowerPAD™ HTSSOP Package Minimizes Board Area and Junction Temperature Rise
  • APPLICATIONS
    • Multiphase Converters in Combination With the TPS40090
    • Non-Isolated 3.3-V, 5-V and 12-V Input dc-to-dc Converters for Processor Power, General Computer, Telecom and Datacom Applications

Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.

The UCC27223 is a high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s).

The UCC27223 includes an enable pin that controls the operation of both outputs. A logic latch is also included to keep both outputs low until the first PWM input pulse comes in. The RDS(on) of the SR pull-down sourcing device is also minimized for higher frequency operations.

This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.

The UCC27223 is offered in the thermally enhanced 14-pin PowerPAD™ package with 2°C/W jc.

The UCC27223 is a high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s).

The UCC27223 includes an enable pin that controls the operation of both outputs. A logic latch is also included to keep both outputs low until the first PWM input pulse comes in. The RDS(on) of the SR pull-down sourcing device is also minimized for higher frequency operations.

This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.

The UCC27223 is offered in the thermally enhanced 14-pin PowerPAD™ package with 2°C/W jc.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 5
Type Title Date
* Data sheet High-Efficiency predictive synchronous buck driver - UCC27223 datasheet 10 Apr 2003
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins Download
HTSSOP (PWP) 14 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos