Calculation tool
UCC5350-Q1
Automotive, ±5-A single-channel isolated gate driver with miller clamp or split outputs for IGBT/SiC
Data sheet
UCC5350-Q1
- 5kVRMS and 3kVRMS single-channel isolated gate driver
- AEC-Q100 qualified for automotive applications
- Temperature grade 1
- HBM ESD classification level H2
- CDM ESD classification level C6
- Feature options
- Split outputs, 8V UVLO (UCC5350SB-Q1)
- Miller clamp, 12V UVLO (UCC5350MC-Q1)
- ±5A minimum peak current drive strength
- 3V to 15V input supply voltage
- Up to 33V driver supply voltage
- 8V and 12V UVLO options
- 100V/ns minimum CMTI
- Negative 5V handling capability on input pins
- 100ns (maximum) propagation delay and <25ns part-to-part skew
- 8-pin DWV (8.5mm creepage) and D (4mm creepage) packages
- Isolation barrier life > 40 Years
- Safety-related certifications:
- 5000VRMS DWV and 3000VRMS D isolation rating for 1 minute per UL 1577
- CMOS inputs
- Operating junction temperature: –40°C to +150°C
The UCC5350-Q1 is a single-channel, isolated gate driver with 5A source and 5A sink minimum peak current designed to drive MOSFETs, IGBTs, and SiC MOSFETs. The UCC5350-Q1 has the option for Miller clamp or Split Outputs. The CLAMP pin is used to connect the transistor gate to an internal FET besides the output to prevent false turn-on caused by Miller current. The split outputs option allows separate control of the rise and fall times of the gate voltage with OUTH and OUTL pins.
Technical documentation
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View all 4 | Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | UCC5350-Q1 Single-Channel Isolated Gate Driver for SiC/IGBT and Automotive Applications datasheet (Rev. E) | PDF | HTML | 05 Feb 2024 |
| Functional safety information | UCC5390-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 16 Mar 2022 | |
| Technical article | Increasing power density with an integrated GaN solution | PDF | HTML | 14 Mar 2022 | |
| Application brief | The Use and Benefits of Ferrite Beads in Gate Drive Circuits | PDF | HTML | 16 Dec 2021 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
Evaluation board
UCC5320SCEVM-058 — UCC5320SC isolated gate driver evaluation module
UCC5320SCEVM is an Evaluation Module used to evaluate UCC53xx family of devices and it provides user with flexiblity of configuring driver to Split output, miller clamp or UVLO based on the device used . The EVM features enough test points & jumper options for one to evaluate the device (...)
User guide: PDF
Evaluation board
UCC5390ECDWVEVM — UCC5390ECDWV 10-A, 10-A 5-kVRMS Isolated Single-Channel Gate Driver Evaluation Module
UCC5390ECDWVEVM is designed for evaluating the UCC53xxDWV family, which is a 5.0-kVRMS Isolated Single-Channel Gate Driver with 10-A source and 10-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC (...)
User guide: PDF
Evaluation board
UCC5390SCDEVM-010 — Compact Single-Channel 3-kVrms Isolated 17-A Gate Drive Bias Supply Evaluation Module
The UCC5390SCDEVM-010 is a complete single channel isolated gate drive board including reconfigurable bias supply providing wide range of drive voltages. The EVM is based on a 17-A split output basic insulation UCC5390SCD Driver in SOIC-8 package. The design also includes SN6505B based bias supply (...)
User guide: PDF
Simulation model
UCC5350MCD Unencrypted PSpice Transient Model (Rev. A)
SLLM367A.ZIP (3 KB) - PSpice Model
Simulation tool
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
| Package | Pins | Download |
|---|---|---|
| SOIC (D) | 8 | View options |
| SOIC (DWV) | 8 | View options |
Ordering & quality
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