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Universal Serial Bus Full Speed Node Controller withEnhanced DMA Support Universal Serial Bus Full

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USB speed (MBits) 12 Rating Catalog Operating temperature range (°C) to
USB speed (MBits) 12 Rating Catalog Operating temperature range (°C) to
LGA (NPK) 28 24.75 mm² 4.5 x 5.5
  • Low EMI, low standby current, 24 MHz oscillator
  • Advanced DMA mechanism
  • Fully static HALT mode with asynchronous wake-up for bus powered operation
  • 5V or 3.3V operation
  • Improved input range 3.3V signal voltage regulator
  • All unidirectional FIFOs are 64 bytes
  • Power-up reset and startup delay counter simplify system design
  • Simple programming model controlled by external controller
  • Available in two packages
    • USBN9603/4SLB: small footprint for new designs and portable applications
    • USBN9603/4-28M: standard package, pin-to-pin compatible with USBN9602-28M

  • Low EMI, low standby current, 24 MHz oscillator
  • Advanced DMA mechanism
  • Fully static HALT mode with asynchronous wake-up for bus powered operation
  • 5V or 3.3V operation
  • Improved input range 3.3V signal voltage regulator
  • All unidirectional FIFOs are 64 bytes
  • Power-up reset and startup delay counter simplify system design
  • Simple programming model controlled by external controller
  • Available in two packages
    • USBN9603/4SLB: small footprint for new designs and portable applications
    • USBN9603/4-28M: standard package, pin-to-pin compatible with USBN9602-28M

The USBN9603/4 are integrated, USB Node controllers. Other than the reset mechanism for the clock generation circuit, these two devices are identical. All references to \x93the device\x94 in this document refer to both devices, unless otherwise noted.

The device provides enhanced DMA support with many automatic data handling features. It is compatible with USB specification versions 1.0 and 1.1, and is an advanced version of the USBN9602.

The device integrates the required USB transceiver with a 3.3V regulator, a Serial Interface Engine (SIE), USB endpoint (EP) FIFOs, a versatile 8-bit parallel interface, a clock generator and a MICROWIRE/PLUS\x99 interface. Seven endpoint pipes are supported: one for the mandatory control endpoint and six to support interrupt, bulk and isochronous endpoints. Each endpoint pipe has a dedicated FIFO, 8 bytes for the control endpoint and 64 bytes for the other endpoints. The 8-bit parallel interface supports multiplexed and non-multiplexed style CPU address/data buses. A programmable interrupt output scheme allows device configuration for different interrupt signaling requirements.

The USBN9603/4 are integrated, USB Node controllers. Other than the reset mechanism for the clock generation circuit, these two devices are identical. All references to \x93the device\x94 in this document refer to both devices, unless otherwise noted.

The device provides enhanced DMA support with many automatic data handling features. It is compatible with USB specification versions 1.0 and 1.1, and is an advanced version of the USBN9602.

The device integrates the required USB transceiver with a 3.3V regulator, a Serial Interface Engine (SIE), USB endpoint (EP) FIFOs, a versatile 8-bit parallel interface, a clock generator and a MICROWIRE/PLUS\x99 interface. Seven endpoint pipes are supported: one for the mandatory control endpoint and six to support interrupt, bulk and isochronous endpoints. Each endpoint pipe has a dedicated FIFO, 8 bytes for the control endpoint and 64 bytes for the other endpoints. The 8-bit parallel interface supports multiplexed and non-multiplexed style CPU address/data buses. A programmable interrupt output scheme allows device configuration for different interrupt signaling requirements.

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Type Title Date
* Data sheet USBN9603 USBN9604 USB Full Speed Node Controller w/Enhanced DMA Support datasheet (Rev. L) 27 Oct 2009
Application note AN-1222 USBN9603/4 - Increased Data Transfer Rate Using Ping-Pong Buffering 10 May 2004

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