Product details

Resolution (Bits) 10 Sample rate (Msps) 25 Gain (min) (dB) 0 Gain (max) (dB) 36 Pd (typ) (mW) 90 Supply voltage (max) (V) 3.3 Operating temperature range (°C) -20 to 75 Output data format CMOS Parallel Rating Catalog
Resolution (Bits) 10 Sample rate (Msps) 25 Gain (min) (dB) 0 Gain (max) (dB) 36 Pd (typ) (mW) 90 Supply voltage (max) (V) 3.3 Operating temperature range (°C) -20 to 75 Output data format CMOS Parallel Rating Catalog
TQFP (PFB) 48 81 mm² 9 x 9
  • 10-Bit, 25-MSPS, Analog-to-Digital Converter (ADC)
  • Single Power Supply Operation, 2.7 V to 3.3 V
  • Low Power: 95 mW at 2.7 V, Power-Down Mode: 1 mW
  • Full-Channel Differential-Nonlinearity Error:
       <±0.5 LSB Typical
  • Full-Channel Intergral-Nonlinearity Error:
       <±1.5 LSB Typical
  • Dual Input Modes: CCD and Video
  • Programmable-Gain Amplifier (PGA) With 0-dB to 36-dB Gain Range (0.047 dB/Step) for CCD Mode, 0-dB to 12-dB Gain Range (0.047 dB/Step) for Video Mode
  • Serial Interface for Register Configuration
  • Programmable Black-Level and Offset Calibration
  • Analog Gain Implementation With Specified No Missing Code, Even At High Gains
  • Additional Digital-to-Analog Converters (DACs) for External Analog Setting
  • Internal Reference Voltages
  • Programmable Internal-Timing Signal Delays
  • 48-Terminal TQFP Package
  • applications
    • Digital Still Camera
    • Digital Camcorder
    • Digital Video Camera

  • 10-Bit, 25-MSPS, Analog-to-Digital Converter (ADC)
  • Single Power Supply Operation, 2.7 V to 3.3 V
  • Low Power: 95 mW at 2.7 V, Power-Down Mode: 1 mW
  • Full-Channel Differential-Nonlinearity Error:
       <±0.5 LSB Typical
  • Full-Channel Intergral-Nonlinearity Error:
       <±1.5 LSB Typical
  • Dual Input Modes: CCD and Video
  • Programmable-Gain Amplifier (PGA) With 0-dB to 36-dB Gain Range (0.047 dB/Step) for CCD Mode, 0-dB to 12-dB Gain Range (0.047 dB/Step) for Video Mode
  • Serial Interface for Register Configuration
  • Programmable Black-Level and Offset Calibration
  • Analog Gain Implementation With Specified No Missing Code, Even At High Gains
  • Additional Digital-to-Analog Converters (DACs) for External Analog Setting
  • Internal Reference Voltages
  • Programmable Internal-Timing Signal Delays
  • 48-Terminal TQFP Package
  • applications
    • Digital Still Camera
    • Digital Camcorder
    • Digital Video Camera

The VSP1021 device is a highly-integrated monolithic analog-signal processor/digitizer designed to interface the area charge-coupled-device (CCD) sensors in digital-camera and camcorder applications. The VSP1021 device performs all the analog processing functions necessary to maximize the dynamic range, corrects various errors associated with the CCD sensor, and then digitizes the results with an on-chip, high-speed ADC. The key components of the VSP1021 device include:

  • Input clamp circuitry and a correlated double sampler (CDS)
  • Programmable-gain amplifier (PGA) with 0-dB to 36-dB gain range for CCD mode and 0-dB to 12-dB range for video mode
  • Two internal DACs for automatic or programmable optical-black-level and offset calibration
  • 10-bit, 25-MSPS pipeline ADC for CCD mode and a 28-MSPS ADC for video mode
  • Parallel data port for easy microprocessor interface and a serial port for configuring internal control registers
  • Two additional DACs for external system control
  • Internal reference voltages

The VSP1021 device is designed using advanced CMOS process and operates from a single 3-V power supply with a normal power consumption of just 95 mW, and 1 mW in power-down mode.

High throughput rate, single 3-V operation, very-low-power consumption, and fully-integrated analog-processing circuitry make the VSP1021 device an ideal CCD and video-signal-processing solution for electronic video-camcorder applications.

This device is available in a 48-terminal TQFP package and is specified over an operating temperature range of –20°C to 75°C.

The VSP1021 device is a highly-integrated monolithic analog-signal processor/digitizer designed to interface the area charge-coupled-device (CCD) sensors in digital-camera and camcorder applications. The VSP1021 device performs all the analog processing functions necessary to maximize the dynamic range, corrects various errors associated with the CCD sensor, and then digitizes the results with an on-chip, high-speed ADC. The key components of the VSP1021 device include:

  • Input clamp circuitry and a correlated double sampler (CDS)
  • Programmable-gain amplifier (PGA) with 0-dB to 36-dB gain range for CCD mode and 0-dB to 12-dB range for video mode
  • Two internal DACs for automatic or programmable optical-black-level and offset calibration
  • 10-bit, 25-MSPS pipeline ADC for CCD mode and a 28-MSPS ADC for video mode
  • Parallel data port for easy microprocessor interface and a serial port for configuring internal control registers
  • Two additional DACs for external system control
  • Internal reference voltages

The VSP1021 device is designed using advanced CMOS process and operates from a single 3-V power supply with a normal power consumption of just 95 mW, and 1 mW in power-down mode.

High throughput rate, single 3-V operation, very-low-power consumption, and fully-integrated analog-processing circuitry make the VSP1021 device an ideal CCD and video-signal-processing solution for electronic video-camcorder applications.

This device is available in a 48-terminal TQFP package and is specified over an operating temperature range of –20°C to 75°C.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Data sheet VSP1021: 3-V, 10-Bit, 21-MSPS, Low-Power Area CCD Analog Front End datasheet (Rev. D) 16 Apr 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins Download
TQFP (PFB) 48 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos