The enormous progress in IC manufacturing over the last 30 years would have been impossible without the science of yield enhancement and defect reduction. Texas Instruments has been an innovator in yield engineering. We’ve improved our own processes and contributed to the general knowledge of the field through participation in industry consortia.

We study methods to improve yields from the earliest stages of development, and we carry on the analysis throughout the lifetime of the process, fanning out knowledge to our fabs and vendors worldwide. The result is a higher return on our manufacturing investment, as well as a more thorough understanding of the manufacturing process. The bottom line is this effort helps us build better products for our customers.

Many factors in current IC processes increase the chance for errors. Design layouts use an expanding variety of pattern adjustment algorithms, which require strategic defect monitoring during early technology development. New materials, such as copper Damascene metallization and low-K dielectrics, bring challenges in the detection of pit defects, removal of resists and polymers, polishing and annealing, film adhesion, line width variation, stress cracking and other areas. As we move to advanced low-K materials such as organo-silicate glass (OSG), many of these issues become even more pronounced.

At TI, we tackle these challenges head-on to make new processes profitable. Our advances in defect identification, diagnostic tooling, data analysis capability and yield impact forecasting drive our wafer fabs toward a higher level of prevention and process improvement. As the pace of change accelerates, information gathering and analysis become even more important to achieve shorter yield ramps and higher yield values. We are developing advanced defect management software that brings new levels of assistance to yield engineers.