/* MODULE GBL */
SECTIONS {
   .vers (COPY): {} /* version information */
}

-c                     /* Use ROM autoinitialization model */

-lrts6201.lib          /* C run-time library support */

/* MODULE MEM */
-stack 0x400
MEMORY {
	VECS	: origin = 0x00000000, len = 0x00000200
	IPRAM	: origin = 0x00000200, len = 0x0000FD00
	SBSRAM	: origin = 0x00400000, len = 0x00040000
	SDRAM0	: origin = 0x02000000, len = 0x00400000
	SDRAM1	: origin = 0x03000000, len = 0x00400000
	IDRAM	: origin = 0x80000000, len = 0x00010000
}


SECTIONS {
        .bss:     {} > IDRAM
        
        .far:     {} > IDRAM
        
        .sysdata: {} > IDRAM
        
        .const:   {} > IDRAM
        
        .printf (COPY): {} > IDRAM
        
        .data:    {} > IDRAM
        
        .cinit:   {} > IDRAM
        
        .pinit:   {} > IDRAM
        
        .trcinit: {} > IDRAM
        
        .gblinit: {} > IDRAM
        
        .sysregs: {} > IDRAM
        
        .switch:  {} > IDRAM
        
        .sysmem:  {} > IDRAM
        
        .cio:     {} > IDRAM
        
        .MEM$obj: {} > IDRAM
        
        .sysheap: {} > IDRAM
        
        .stack: fill=0xc0ffee {
            GBL_stackbeg = .;
            *(.stack)
            GBL_stackend = GBL_stackbeg + 0x400 - 1;
        } > IDRAM
        
        .sysinit: {} > IPRAM
        
        frt:    {} > IPRAM
        
        .text:    {} > IPRAM
        
        .hwi: {}  > IPRAM
        
        .bios:    {} > IPRAM
        
}