title {dsp-dram controller 2x speed conversion }

include p22v10;                         /* pins listed in standard format */
include xor;                            /* -5 pin in comments */

/* upper 2 bit for dram module conrol */
define a19 = pin23;     /*  4 */
define a18 = pin22;     /* 25 */

/* row address for dram module conrol */
define a17 = pin21;    /*  5 */
define a16 = pin20;    /* 23 */
define a15 = pin1;     /*  1 */
define a14 = pin2;     /*  2 */
define a13 = pin3;     /*  3 */
define a12 = pin4;     /* 12 */
define a11 = pin5;     /* 13 */
define a10 = pin6;     /* 14 */
define a9  = pin7;     /* 15 */

 /* row address from flipflop for dram module conrol */
define qa17 = pin17;   /*  9 */
define qa16 = pin16;   /* 19 */
define qa15 = pin15;   /* 11 */
define qa14 = pin14;   /* 18 */
define qa13 = pin13;   /* 28 */
define qa12 = pin11;   /* 27 */
define qa11 = pin10;   /* 26 */
define qa10 = pin9;    /* 17 */
define qa9  = pin8;    /* 16 */

define match = pin19;  /*  7 */
define temp = pin18;   /* 21 */

temp = (a9 % qa9)
     | (a10 % qa10)
     | (a11 % qa11)
     | (a12 % qa12)
     | (a13 % qa13)
     | (a14 % qa14)
     | (a15 % qa15) ;

match = !a18 & !a19 & ( temp | (a16 % qa16) | (a17 % qa17));