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> Test Considerations for PLDs
> SN74184 BCD-TO-BINARY converter using 16L8 (JEDEC and ProLogic source files)
> SN74185 BINARY-TO-BCD converter using 22V10 (JEDEC and ProLogic source files)
> 4 bit decade counter w/7 segment LED output using a 22v10. (JEDEC and ProLogic source files)
> 74373/74573 type latchs using a 16L8s. (ProLogic source)
> An example how to use feedback to control the output enable of another pin. (ProLogic source)
> 1/3 of a 74XX604 Implemented in a 22V10 architecture. (ProLogic source)
> DSP-dram controller interface. (ProLogic source)
> 10-bit presetable counter: unevaluated. (ABEL source)
> Berkley SPICE deck for 16L8-5.
> SPICE I-V data output for -5 registered outputs.
> Thermal impedance data (Theta JA & Theta JC)
> Competitor PLD cross reference (pdf file - 24Kb)
> AMD vs. TI parameter definitions
> VIHH pins for programming DIP devices
> VIHH pins for programming PLCC devices
> Metastability Report on TI PLDs
> TIC22V10Z Design Recommendations