High-Speed Data Acquisition & Generation

Block Diagram (SBD) for a high-speed data acquisition front-end solution utilizing high-speed ADCs and DACs, amplifiers, and TI DSPs to capture, analyze and generate high-speed analog signals

Block Diagram

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High Speed Data Acquisition System

A high speed data acquisition system implements high-speed integrated circuits to trigger and acquire high data rate flow control and storing.

Core Subsystems include:

  • Analog Input Front End - built around a high-speed ADC including high-speed Op-Amps, FIFOs, and SRAMs. The stream of data output from the ADC is written into FIFOs, stored in blocks of SRAM, and sent directly to the outside world through registers under the control of the data acquisition logic in the FPGA.
  • FPGA - contains data acquisition controls and logics including the trigger logic, error detection, DSP interface, memory address decoder, counters, and output control. The control logic selects a data acquisition clock, processes different triggers, and transfers the acquired data to the internal memory of the data acquisition channels.
  • Analog Output - built around a high-speed DAC, including Op-Amp and output data buffer.
  • High-Speed Bus Interface - transfers data through high-speed parallel bus on the back plane (PCI,VMEbus) or high-speed Ethernet.
  • Clock Source - provides clock for different data acquisition options and modes.
  • Power Managements - converts the input power from the backplane to run various functional blocks.
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Application Notes (3)

Title Abstract Type Size (KB) Date Views
HTM 8 KB 09 Oct 2011 4524
HTM 9 KB 21 Sep 2009 1719
HTM 8 KB 19 Aug 2008 1489

Selection and Solution Guides

Selection Guides (1)

Title Abstract Type Size (KB) Date Views
PDF 794 KB 27 Oct 2010 512

Tools and Software

Name Part # Company Software/Tool Type
Anti-Aliasing Calculation Tool for A to D Converters ANTIALIASINGCALC Texas Instruments Calculation Tools
Code Composer Studio (CCS) Integrated Development Environment (IDE) CCSTUDIO Texas Instruments SW Development Tools, IDEs, Compilers
Op Amp to ADC Circuit Topology Calculator ADC-INPUT-CALC Texas Instruments Calculation Tools
TMS320C6748 DSP Development Kit (LCDK) TMDXLCDK6748 Texas Instruments Development Kits

Product Bulletin & White Papers

Product Bulletin (2)

Title Abstract Type Size (MB) Date Views
PDF 216 KB 03 Sep 2014 515
PDF 208 KB 25 Apr 2011 661

White Papers (4)

Title Abstract Type Size (MB) Date Views
PDF 207 KB 06 Feb 2013 554
PDF 1.09 MB 12 Nov 2012 605
PDF 652 KB 09 Oct 2012 367
PDF 1014 KB 17 May 2011 760

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Training & events

Name Type Available During
Designing High Speed Video and Audio Systems
Today’s digital signal processors (DSPs) are typically run at a 1GHz internal clock rate...
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Getting to Faster Performance with Serial Rapid IO™
Today’s technologies require very high data rates to move into and within the processor cluster.
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High-Speed Board Design Considerations for OMAP
The OMAP35x BGA package was designed to simplify board layout. When trying to maximize performance, they can be sensitive.
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High-Speed Board-Design Considerations for OMAP™ Applications
The OMAP35x BGA package was designed to simplify board layout.
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TI Defence & Space Tech Day
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