High-Speed Data Acquisition & Generation

Block Diagram (SBD) for a high-speed data acquisition front-end solution utilizing high-speed ADCs and DACs, amplifiers, and TI DSPs to capture, analyze and generate high-speed analog signals

Reference Designs


High Speed Data Acquisition System

A high speed data acquisition system implements high-speed integrated circuits to trigger and acquire high data rate flow control and storing.

Core Subsystems include:

  • Analog Input Front End - built around a high-speed ADC including high-speed Op-Amps, FIFOs, and SRAMs. The stream of data output from the ADC is written into FIFOs, stored in blocks of SRAM, and sent directly to the outside world through registers under the control of the data acquisition logic in the FPGA.
  • FPGA - contains data acquisition controls and logics including the trigger logic, error detection, DSP interface, memory address decoder, counters, and output control. The control logic selects a data acquisition clock, processes different triggers, and transfers the acquired data to the internal memory of the data acquisition channels.
  • Analog Output - built around a high-speed DAC, including Op-Amp and output data buffer.
  • High-Speed Bus Interface - transfers data through high-speed parallel bus on the back plane (PCI,VMEbus) or high-speed Ethernet.
  • Clock Source - provides clock for different data acquisition options and modes.
  • Power Managements - converts the input power from the backplane to run various functional blocks.

Application notes & user guides

Application Notes (3)

Title Abstract Type Size (KB) Date Views
HTM 8 KB 09 Oct 2011 10762
HTM 9 KB 21 Sep 2009 2070
HTM 8 KB 19 Aug 2008 2453

Selection & solution guides

Selection Guides (1)

Title Abstract Type Size (KB) Date Views
PDF 794 KB 27 Oct 2010 856

Product bulletin & white papers

Product Bulletin (2)

Title Abstract Type Size (MB) Date Views
PDF 216 KB 03 Sep 2014 369
PDF 208 KB 25 Apr 2011 1037

White Papers (3)

Title Abstract Type Size (MB) Date Views
PDF 1.09 MB 12 Nov 2012 579
PDF 652 KB 09 Oct 2012 387
PDF 1014 KB 17 May 2011 807

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