Vector Signal Generator

Block Diagram (SBD) for a generator of complex Radio Frequency signals utilizing one of two primary upconversion techniques, heterodyne or direct.

Block Diagram

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AC/DC Supply

Design Considerations

Vector Signal Generators (VSGs) produce complex RF signals utilizing one of two primary upconversion techniques: heterodyne or direct. The heterodyne approach employs digital upconversion to create a digital intermediate frequency (IF) which is converted into the RF domain through the use of a single Digital to Analog Converter (DAC) and a single or multi-stage mixer. The direct conversion architecture is often found in modern Vector Signal Generators because of the simplicity and cost effectiveness of design. Two DACs are utilized to create analog I and Q signals which are then mixed with a local oscillator to product two signals that are 90 degrees out of phase. These translated baseband signals are then summed to produce the RF signal.

The common sub-systems include:

Digital Signal Processing

In a VSG, the job of creating the baseband signal to be transmitted is handled in software implemented on DSP cores. The DSP is capable of handling the performance requirements of the signal processing algorithms needed for such a function and at the same time provides the flexibility of changing system functionality and characteristics of the generated signal. Depending on the loaded software, the same hardware can generate baseband signals adhering to different wireless and wireline standards. Typical functions performed on the DSP include Channel Coding, Forward Error Correction Coding, Constellation Mapping, Modulation, Standards-based Data Framing, Channel Impairment Generation and many other types of physical layer signal processing. A DSP is often used to perform control functions as well as implement some higher layer protocol features.

Baseband / IF

High-speed Digital to Analog Converters with superior linearity, noise, crosstalk, and PLL phase noise performance are critical to the overall performance of the VSG. These DACs contain onboard interpolation filters (FIR) that are configurable in either Low-Pass or High-Pass mode, allowing selection of a higher order output spectral image. Some allow both complex and real output.

RF Upconversion

The local oscillator provides a programmable, low-phase noise signal to be mixed with the analog I and Q signals created by the DACs. The I/Q modulator then converts these complex modulated signals from baseband or IF directly up to RF. Finally, signals are passed through the RF power amplifier and bandpass filter.

Power Management and Conversion

Vector Signal Generators exist in various form factors such as bench, portable, and modular (or backplane based). The form factor plays a large role in determining the power management requirements of the instrument. For example, many bench VSGs are based on a computer architecture, leveraging display, interface, and power management functions from the high-volume PC market. Other VSGs operate from batteries for use in field service applications. Texas Instruments offers power management solutions for each of the available instrument form factors.

Application Notes (3)

Title Abstract Type Size (KB) Date Views
HTM 9 KB 14 Oct 2008 98
HTM 8 KB 07 Oct 2008 100
HTM 8 KB 02 Jun 2008 402

User Guides (1)

Title Abstract Type Size (KB) Date Views
htm 8 KB 03 Feb 2011 144

Reference Designs

Selection and Solution Guides

Selection Guides (2)

Title Abstract Type Size (KB) Date Views
PDF 9.51 MB 01 May 2014 28125
PDF 4.91 MB 03 Jul 2008 513

Tools and Software

Name Part # Company Software/Tool Type
C64x+ IQMath Library - A Virtual Floating Point Engine SPRC542 Texas Instruments Software Libraries
TMS320C6000 DSP Library (DSPLIB) SPRC265 Texas Instruments Software Libraries

Product Bulletin & White Papers

Product Bulletin (2)

Title Abstract Type Size (MB) Date Views
PDF 228 KB 09 Jun 2011 407
PDF 208 KB 25 Apr 2011 753

White Papers (3)

Title Abstract Type Size (MB) Date Views
PDF 1014 KB 17 May 2011 853
PDF 562 KB 21 Dec 2010 508
PDF 423 KB 09 Nov 2010 514

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