The DP83867ERGZ-R-EVM supports 1000/100/10BASE and is compliant with the IEEE 802.3 standard. This reference design supports the RGMII MAC interface.
The DP83867ERGZ-R-EVM evaluation module (EVM) for the DP83867 device includes 3 on-board status LEDs and 5-V connectors with onboard LDO regulators. The EVM is JTAG accessible and can provide a 125-MHz reference clock from an on-board 25-MHz crystal. The serial management interface, MDIO/MDC, is supported and can be used to access the PHY registers for additional features. The 4-level straps let you configure the system without the need to directly access the PHY registers. External power supplies can be connected to each specified voltage rail for additional system evaluation. The DP83867 EVM supports wake-on-LAN, start-of-frame detect IEEE 1588 timestamp and configurable I/O voltages.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | EVM User's guide | DP83867ERGZ-R-EVM Getting Started | 26 Oct 2015 | |
| * | EVM User's guide | DP83867ERGZ EVM User's Guide | 05 Oct 2015 | |
| Data sheet | DP83867E/IS/CS Robust, High Immunity, Small Form Factor 10/100/1000 Ethernet Physical Layer Transceiver datasheet (Rev. D) | PDF | HTML | 15 Nov 2022 | |
| Technical article | Top 3 considerations for harsh industrial Ethernet | PDF | HTML | 04 Nov 2019 | |
| Certificate | DP83867ERGZ-R-EVM EU Declaration of Conformity (DoC) | 02 Jan 2019 | ||
| Technical article | How Ethernet technology is shifting modern markets 40 years after its inception | PDF | HTML | 27 Jul 2015 | |
| Technical article | Three things you should know about Ethernet PHY | PDF | HTML | 15 Jul 2015 |
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.