CDCLVP1204EVM

CDCLVP1204 Evaluation Module

CDCLVP1204EVM

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Overview

The CDCLVP1204 is a high-performance, low additive phase noise clock buffer. It has two universal input buffers that support either single-ended or differential clock inputs, selectable through a control pin. The device also features on-chip bias generators that can provide the LVPECL common-mode voltage to the device inputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVP1204. This fully assembled and factory-tested evaluation board allows complete validation of the CDCLVP1204 device functionalities. For optimum performance, the board is equipped with 50-ohm SMA connectors and well-controlled, 50-ohm impedance microstrip transmission lines.

Features
  • Easy-to-use evaluation board to fan out low phase noise clocks
  • Easy device setup
  • Fast configuration
  • Control pins configurable through jumpers
  • Board powered at +2.5-/+3.3V
  • Single-ended or differential input clocks
  • CDCLVP1204 supports four LVPECL outputs; CDCLVP1204EVM supports two LVPECL outputs
Clock buffers
CDCLVP1204 Low-jitter, two-input, selectable 1:4 universal-to-LVPECL buffer
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Evaluation board

CDCLVP1204EVM — CDCLVP1204 Evaluation Module

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Technical documentation

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Type Title Date
Certificate CDCLVP1204EVM EU Declaration of Conformity (DoC) 02 Jan 2019
User guide CDCLVP1204 User's Guide 09 Jul 2009

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