DEV-ADC34J22 Evaluation Module
The DEV-ADC34J22 is a four-channel, 50MSPS ADC Module designed to integrate with Altera’s HSMC standard. The DEV-ADC34J22 features TI’s new JESD204B compliant ADC34J22 Analog Digital Converter (ADC), with clocking conditioning using TI’s LMK04828 jitter cleaner. It provides single-ended DC coupled inputs on two of the four channels through TI’s THS4541 850MHz BW fully differential amplifier.
The module offers six front panel SMA connectors: 1 EXT trigger, 1 EXT clock and 4 Analog Input Channels, and an on board 10MHz TCXO for stand -alone clock generation, with a 100MHz VCXO used in conjunction with the LMK04828B for reference clock jitter cleaning. The ADC34J22 and the LMK04828B are completely configurable via Altera’s Cyclone V SOC FPGA with embedded ARM Cortex A9 processors. The DEV-ADC34J22 supports a wide range of applications and offers two RF (AC coupled) channels and two Analog (DC coupled) channels.
AC Coupled RF Front End Features
Two Analog DC Coupled Input Channels