LMK04610 Ultra Low-Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual PLLs EVM
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- LMK04610 Evaluation Board User's Guide (Rev. A)
(PDF 8637 KB)
01 Feb 2017
The LMK04610EVM features LMK04610 ultra Low-noise and low power JESD204B compliant Dual Loop Jitter Cleaner. With a power consumption of only 900 mW with all outputs running, LMK04610 supports sub-74 fs jitter (12 kHz to 20 MHz) using a low noise VCXO module. Integrated LDOs provide high PSRR that enables the use of DC/DC converters.
- Dual Loop Architecture with typical 60 fs rms from 10 kHz to 20 MHz at 122.88 MHz output frequency
- Integrated Loopfilter support easy prototyping
- 0.9 W typical power consumption for 10 outputs at 122.88 MHz
- Jumper configurable supplies with on-board LDOs and DCDC converters
- GUI platform for full access to device registers