PMP10202

56W Active Clamp for Telecom Apps Reference Design

PMP10202

Design files

Overview

This reference design provides 28V out of 48V input voltage to supply noise sensitive loads

Features
  • designed for lowest noise
  • suitable for constant output current to supply RF power stages
  • wide input voltage range (36V - 60V)
  • output current to 2A pk
  • input and output ripple less than 50mV pp
Output voltage options PMP10202.1
Vin (Min) (V) 36
Vin (Max) (V) 60
Vout (Nom) (V) 28
Iout (Max) (A) 2
Output Power (W) 56
Isolated/Non-Isolated Isolated
Input Type DC
Topology Forward- Active Clamp
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUAM0.PDF (1338 K)

Test results for the reference design, including efficiency graphs, test prerequisites and more

TIDRGW2.PDF (187 K)

Detailed schematic diagram for design layout and components

TIDRGW3.PDF (83 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRGW5.ZIP (570 K)

Files used for 3D models or 2D drawings of IC components

TIDCAW3.ZIP (48 K)

Design file that contains information on physical board layer of design PCB

TIDRGW4.PDF (732 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

AC/DC & DC/DC controllers (external FET)

UCC2897A110-V active clamp current mode PWM controller with P-channel clamp FET and line OV protection

Data sheet: PDF | HTML
Shunt voltage references

TL432Adjustable precision shunt regulator (reverse pinout)

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
Test report PMP10202 Test Results Sep. 14, 2015

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