PMP11184

High Efficiency, Power Density 1V/120A/30A/30A (4+1+1) w/ PMBus Reference Design for ASIC Processors

PMP11184

Design files

Overview

PMP11184 is a chipset solution for high current ASIC core rail regulation. It utilizes TPS53647 4-phase controller for 120A high current rail, which employs  DCAP+ control for fast transient response and TI's proprietary AutoBalance for tight steady and dynamic phase-to-phase current balance. It also utilizes TPS40428 dual controller for dual 30A rails. Both controllers drive TI NexFET smart power stages for high power density and efficiency. PMBus capability and on-board NVM enable easy design, configuration, and customization, with telemetry of output voltage, current, temperature, and power.

Features
  • Detached layout enables flexible placement
  • High efficiency 91% at 1V/120A, 300kHz, 12Vin
  • Excellent thermal performance (72C FET temperature at full load with 200LFM air flow)
  • Combined ripple and transient response within +/-2%.
  • Full PMBus telemetry of output voltage, current, power and temperature
Output voltage options PMP11184.1 PMP11184.2
Vin (Min) (V) 7 7
Vin (Max) (V) 13.2 13
Vout (Nom) (V) 1 1
Iout (Max) (A) 120 30
Output Power (W) 120 30
Isolated/Non-Isolated Non-Isolated Non-Isolated
Input Type DC DC
Topology Buck- Multiphase^Buck- Synchronous Buck- Multiphase^Buck- Synchronous
??image.gallery.download_en_US?? View video with transcript Video

A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUAR5.PDF (2399 K)

Test results for the reference design, including efficiency graphs, test prerequisites and more

TIDRHF8.PDF (280 K)

Detailed schematic diagram for design layout and components

TIDRHF9.PDF (123 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDCB11.ZIP (282 K)

Design file that contains information on physical board layer of design PCB

TIDRHG0.PDF (905 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

AC/DC & DC/DC controllers (external FET)

TPS40428Dual Output, 2-Phase, Stackable PMBus Synchronous Buck Driverless Controller

Data sheet: PDF | HTML
AC/DC & DC/DC controllers (external FET)

TPS536474-Phase, D-CAP+TM Step-Down Buck Controller with NVM and PMBus Interface for ASIC

Data sheet: PDF | HTML
Si power stages

CSD95372BQ5M60A Synchronous Buck NexFET™ Smart Power Stage

Data sheet: PDF | HTML
Si power stages

CSD95378BQ5M60A Synchronous Buck NexFET™ Smart Power Stage with TAO offset

Data sheet: PDF | HTML

Technical documentation

star
= Top documentation selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Test report PMP11184 Test Results Sep. 24, 2015

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​

Videos