The PMP8973 reference design generates a 3.3V/15A output from an 18V to 60V telecom input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD16415Q5 and CSD18502Q5B, implemented as synchronous rectifiers, provides for a highly efficient design. This design is laid out in a standard eighth brick footprint and achieves peak efficiencies over 92%. It includes remote sensing of the output voltage.
| Output voltage options | PMP8973.1 |
|---|---|
| Vin (Min) (V) | 18 |
| Vin (Max) (V) | 60 |
| Vout (Nom) (V) | 3.3 |
| Iout (Max) (A) | 15 |
| Output Power (W) | 49.5 |
| Isolated/Non-Isolated | Isolated |
| Input Type | DC |
| Topology | Forward- Active Clamp^Forward- Synchronous |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
Download ready-to-use system files to speed your design process.
Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Detailed overview of design layout for component placement
Design file that contains information on physical board layer of design PCB
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Test report | PMP8973 Test Results | Jul. 16, 2015 |
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.