Xilinx Virtex UltraScale FPGA Power Solution with PMBus Reference Design
PMP9475
(ACTIVE)
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Description
The PMP9475 12V-input reference design provides all the power supply rails necessary to power Xilinx's Virtex® UltraScale™ family of FPGAs in a compact, highly efficient design. This design uses several of TI's PMBus Point-Of-Load voltage regulators for ease of design/configuration and telemetry of critical rails. It features a UCD90120A for flexible power up and power down sequencing as well as voltage monitoring, current monitoring, and voltage margining through the PMBus interface.
Features
- Provides all the power supply rails needed for a Xilinx Virtex® UltraScale™ FPGA
- Design optimized to support a 12V input
- On board power up and power down sequencing
- PMBUS interface with output voltage and current reporting
- Voltage margining feature
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Schematic/Block Diagram
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TI Devices (7)
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CAD/CAE symbols
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Texas Instruments and Accelerated Designs, Inc. have collaborated together to provide TI customers with schematic symbols and PCB layout footprints for TI products.
Step 1: Download and install the free download.
Step 2: Download the Symbol and Footprint from the CAD.bxl file table.
Step 3: Open the .bxl file with the Ultra Librarian software.
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Technical Documents
See the Important Notice and Disclaimer covering reference designs and other TI resources.
User guides (2)
| | PDF | 889 |
05 May 2015
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| | PDF | 276 |
18 Nov 2014
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Design files (3)
| | ZIP | 2704 |
05 Aug 2014
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| | PDF | 106 |
05 Aug 2014
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| | PDF | 1397 |
05 Aug 2014
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