The circuit represents a high-performance data acquisition (DAQ) solution suitable for processing input signals (up to ±12 V) superimposed on large common-mode offsets (tested up to 155 Vp-p from dc to approximately 15 kHz) relative to the ground potential of the system's main power supply. Common-mode rejection is achieved by generating an isolated power supply to allow the analog signal chain to float with the input common-mode signal. The analog signal chain consists of a high-performance, 16-bit, 1-MSPS SAR ADC with an integrated analog front end (AFE) that offers high input impedance and a wide ±12-V input voltage range. Relevant application areas include PLC analog input modules with channel-to-channel isolation, automotive battery pack monitoring, power monitoring in AC motor drives and thermocouple measurements.
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Reference design overview and verified performance test data
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Design file that contains information on physical board layer of design PCB
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Design guide | Data Acquisition System for High-Voltage Common Mode Rejection Design Guide | Mar. 01, 2016 |
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