Analog Front-End Reference Design for Imaging Using Time-Interleaved SAR ADCs with 73dB SNR, 7.5MSPS

(ACTIVE) TIDA-01355

Description & Features

Technical Documents

Support & Training

Order Now


View the Important Notice for TI Designs covering authorized use, intellectual property matters and disclaimers.

Key Document

Description

This reference design demonstrates how to achieve multiple ADC interleaving with high sampling rates and good resolution at low BOM-cost. The reference design was built with electronic imaging systems in mind. High definition imaging and other high speed signal processing applications require ADCs that can achieve high resolution, high SNR, high speed and low power consumption. These requirements cannot always be met with a  single chip. By interleaving multiple SAR ADCs, the design optimizes trade-offs between different ADCs in order to meet all of the system requirements.

Features
  • Resolution: 14-bit
  • input type: unipolar single-ended
  • SNR > 73dB, ENOB: 12-bit, THD < -80dB
  • Power: < 33mW
  • Low latency compared to pipeline ADC-based solution
  • Small form factor: 22mm x 13mm

View the Important Notice for TI Designs covering authorized use, intellectual property matters and disclaimers.


  



Schematic/Block Diagram

Quickly understand overall system functionality.

Download Schematic

Design Guide

Get results faster with test and simulation data that's been verified.

Download Design Guide

Design Files

Download ready-to-use system files to speed your design process. Get Viewer.

Download Design Files


Bill of Materials (BOM)

Find the complete list of components in this reference design.

Download BOM

TI Devices (5)

Order samples, get tools and find more information on the TI products in this reference design.

Part Number Name Product Family Sample & Buy Design Kits & Evaluation Modules
ADS7056  14-Bit 2.5MSPS Ultra-Low-Power Ultra-Small-Size SAR ADC With SPI Interface  Analog-to-digital converters (ADCs)  Sample & Buy View Design Kits & Evaluation Modules
LP5907  250mA Ultra-Low-Noise Low-IQ LDO  Power management  Sample & Buy View Design Kits & Evaluation Modules
OPA836  Very Low Power, Rail to Rail out, Negative Rail in, VFB Op Amp  Operational amplifiers (op amps)  Sample & Buy View Design Kits & Evaluation Modules
REF2033  Low-Drift, Low-Power, Dual-Output Vref and Vref/2 Voltage Reference  Voltage references  Sample & Buy View Design Kits & Evaluation Modules
SN74AUCH244  Octal Buffer/Driver with 3-State Outputs  Buffer/driver  Sample & Buy Not Available

CAD/CAE symbols

Part # Package | Pins CAD File (.bxl) STEP Model (.stp)
ADS7056 Download Download
LP5907 Download Download
Download -
Download Download
OPA836 Download Download
Download -
REF2033 Download -
SN74AUCH244 Download Download

Texas Instruments and Accelerated Designs, Inc. have collaborated together to provide TI customers with schematic symbols and PCB layout footprints for TI products.

Step 1: Download and install the free download.

Step 2: Download the Symbol and Footprint from the CAD.bxl file table.


Technical Documents

View the Important Notice for TI Designs covering authorized use, intellectual property matters and disclaimers.

Application notes (1)
Title Abstract Type Size (KB) Date Views
PDF 1313 26 May 2017 27
User guides (1)
Title Abstract Type Size (KB) Date Views TI Recommends
PDF 1400 07 Aug 2017 26
Design files (7)
Title Abstract Type Size (KB) Date Views
ZIP 262 07 Aug 2017 12
ZIP 1756 07 Aug 2017 4
PDF 235 07 Aug 2017 3
PDF 786 07 Aug 2017 2
PDF 187 07 Aug 2017 3
PDF 98 07 Aug 2017 3
PDF 319 07 Aug 2017 31

Support & Training

Try our support forums.
Search expert answers for this part Ask a new question

Content is provided 'AS IS' by the respective TI and Community contributors and does not constitute TI specifications.
See terms of use.

Blogs