Altera Cyclone III FPGA Power Management Reference Design

(ACTIVE) PMP2543

Description & Features

Technical Documents

Support & Community


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Description

The Cyclone III power management design is a complete, non-isolated power solution and provides all 5 required rails for powering the FPGA. The design also includes complete power solutions for DDR Memory VTT and VDDQ rails and USB power. This design is optimized to power the Altera 3C25F324 starter kit.

Features
  • Design supports 12V input voltage
  • Uses one-chip DDR memory power IC to reduce parts count
  • Provides a complete low-cost discrete solution
  • Higher efficiency than power solution found on 3C25F324 Starter Kit
  • Existing starter kit catch diodes are overloaded
  • Reference design has been built and tested


    

TI Devices (4)

Get more information on the TI products in this reference design.

Part Number Name Product Family
TLV1117  Single Output LDO, 800mA, Fixed and Adj., Internal Current limit, Thermal Overload Protection  Linear Regulator (LDO) 
TPS51116  DDR1, DDR2, DDR3 Switcher and LDO  Power Management 
TPS54354  4.5V to 20V Input, 1.8V Output, 3A Synchronous Step-Down Converter with Low-Side FET Gate Driver  Converter (Integrated Switch) 
TPS54356  4.5V to 20V Input, 3.3V Output, 3A Synchronous Step-Down Converter with Low-Side FET Gate Driver  Converter (Integrated Switch) 


Technical Documents
Application Notes (1)
Title Abstract Type Size (KB) Date Views
PDF 314 27 Mar 2008 915
User Guides (1)
Title Abstract Type Size (KB) Date Views
PDF 1253 14 Nov 2011 226
More Literature (2)
Title Abstract Type Size (KB) Date Views
PDF 31 14 Nov 2011 214
PDF 84 14 Nov 2011 219

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