Xilinx Artix 7 FPGA Power Management Reference Design

(ACTIVE) PMP7977

Description & Features

Technical Documents

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Description

The Artix 7 power management reference design board uses power modules, linear regulators, and a PMBus compliant system controller to supply all required core and auxiliary voltages needed by the FPGA, including DDR memory termination. A Digital Power graphical user interface is used to monitor the voltage and current levels of the board’s power rails.

Features
  • Design optimized to support a 12V input
  • 2 PMBus controllers monitors a total of 9 voltage rails
  • Solution contains power modules providing up to 6A output current
  • Low-noise LDOs provide power for transcievers
  • DDR Memory provides volatile synchronous dynamic random access memory to store user code and data
  • Design has been built and tested. Reference board is available from Xilinx



  




Parametrics
PMP7977
Vin (Min) (V) 4.5
Vin (Max) (V) 14
Vout (Nom) (V) 1
Iout (Max) (A) 10
Output Power 10
Isolated/Non-Isolated Non-Isolated
Input Type DC
Topology Buck- Synchronous
Designed for FPGA Y

TI Devices (10)

Order samples, get tools and find more information on the TI products in this reference design.

Part Number Name Product Family Sample & Buy Design Kits & Evaluation Modules
INA333  Low Power, Precision Instrumentation Amplifier  Instrumentation Amplifier  Sample & Buy View Design Kits & Evaluation Modules
SN74AVC1T45  Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs  Logic  Sample & Buy View Design Kits & Evaluation Modules
SN74LV541A  Octal Buffers/Drivers With 3-State Outputs  Buffer/Driver/Transceiver  Sample & Buy Not Available
TL1963A  Single Output LDO, 1.5A, Adj. (1.21V to 20V), Fast Transient Response  Linear Regulator (LDO)  Sample & Buy View Design Kits & Evaluation Modules
TLV1117-33  Single Output LDO, 800mA, Fixed(3.3), Internal Current limit, Thermal Overload Protection  Linear Regulator (LDO)  Not Available Not Available
TPS51200  3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4  Power Management  Sample & Buy View Design Kits & Evaluation Modules
TPS79433  Single Output LDO, 250mA, Fixed(3.3V), High PSRR, Low Noise  Linear Regulator (LDO)  Sample & Buy View Design Kits & Evaluation Modules
TPS84320  4.5-V to 14.5-V Input, 3-A Synchronous Buck, Integrated Power Solution  Non-Isolated Module  Sample & Buy Not Available
TPS84621  2.95-V to 14.5-V Input, 6-A Synchronous Buck, Integrated Power Solution  Non-Isolated Module  Sample & Buy Not Available
UCD90120A  12-Rail Power Supply Sequencer and Monitor with ACPI Support  Power Management  Sample & Buy View Design Kits & Evaluation Modules

Technical Documents
User Guides (3)
Title Abstract Type Size (KB) Date Views
PDF 596 11 Jun 2014 202
PDF 211 12 May 2014 330
PDF 4435 11 Sep 2013 488
Selection Guides (1)
Title Abstract Type Size (KB) Date Views
PDF 473 20 Jun 2014 789
Design Files (3)
Title Abstract Type Size (KB) Date Views
PDF 595 11 Jun 2014 198
PDF 598 11 Jun 2014 662
PDF 6781 11 Sep 2013 407

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