This reference design generates a 5V/15A output from a 36V to 75V telecom input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD17501Q5A and CSD18502Q5B, implemented as a synchronous rectifiers, provides for a highly efficient design. This design is laid out in a standard eighth brick footprint and achieves efficiencies up to 94%. It uses only surface mount components, including ceramic output capacitors.
| Output voltage options | PMP9126.1 |
|---|---|
| Vin (Min) (V) | 36 |
| Vin (Max) (V) | 75 |
| Vout (Nom) (V) | 5 |
| Iout (Max) (A) | 15 |
| Output Power (W) | 75 |
| Isolated/Non-Isolated | Isolated |
| Input Type | DC |
| Topology | Forward- Active Clamp^Forward- Synchronous |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| Test report | PMP9126 Test Results | Oct. 22, 2013 |
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