Description

The signal generator module repository contains SIN generator ramp generator, trapezoidal & profile- generator modules. The signal generator modules are implemented using modulo arithmetic counter (i.e. Any overflow is ignored and only the remainder is kept) to precisely control the frequency. The frequency of the generated signal is reciprocal of the time it takes for successive overflow of modulo counter, which in turn commensurate with the step value added to the counter. Thus by changing the step value, one can precisely control the frequency.

The step value is not directly commanded to vary the frequency, instead the modulation of frequency is performed using the normalized variable "freq" which is normalized to the maximum frequency. The maximum required frequency is predetermined based on the application requirement and it set by initializing the "step_max" input. Thus, the normalized variable "freq" allows the user to control the frequency of the signal between 0 to maximum frequency. This strategy is adopted for all signal generator modules. The following table summarizes the set of modules that are available in this library. 

Note: 

• Documentation of Signal generator Modules is archived in the self-extracting zip file, and the pdf files can be found in c:\tidcs\c24\dsp_tbox\sgen\doc directory.

• Software Test Bench (STB) support library must be downloaded to use the STB examples.

Software Test Bench:

To facilitate evaluation and deployment of these modules, they are made available as Software Test Benches (STBs) which run as code composer projects on readily available EVMs or eZdsp hardware platforms. 

Each STB focuses on a particular software module and shows the customer how to invoke it, pass variable or data to it, and how to link it into their systems. Where possible, the module under evaluation is made to interact with other modules such as signal generators, which can provide input stimulus and data-logging modules or EVM-DAC drivers to examine a module´s response in a real-time environment. This helps customers to get a more realistic feel of the software module´s capability and applicability.   

The idea behind the STB strategy to demonstrate the signal generator module is indeed simple. Signal generator module is initialized to generate 50Hz signal and the outputs are logged, sent through EVMDAC and PWMDAC1 so that the user can quickly start evaluating the signal generator modules by varying the module properties and observing the response.

Features

• "C" callable assembly interface & Direct ASM interfaceObject oriented, re-entrant, multiple times "instance-able" modules
• Each module has it’s own Software Test bench (STB) for a quick and easy "self contained" evaluation
• STB framework is offered as a Code Composer project
• Fully documented (PDF files are included within the self extracting zip file)