Wideband Receiver Reference Design for Upstream DOCSIS 3.1 Applications TIDA-01378 (ACTIVE)

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Key Document

Description

This reference design consists of an analog front-end (AFE) signal chain for wideband receiver applications using the LMH2832 digitally controlled variable gain amplifier (DVGA) and ADS54J40 analog-to-digital converter (ADC). The design is primarily targeted for upstream DOCSIS 3.1 receiver applications specified for cable modem termination systems (CMTS) and supports up to 196 MHz of upstream signal bandwidth. The circuit solves the filtering and analog signal processing requirements for the DOCSIS 3.1 standard, which makes it easier for system designers to readily incorporate the design on the CMTS-side of the upstream signal path.

Features
  • AC-coupled signal path from 100 kHz to 204 MHz with 196 MHz of upstream-signal-bandwidth support for DOCSIS 3.1 applications
  • 58 dBFs of minimum system SNR (200 MHz BW) for –1-dBFs input at the ADC
  • 70 dBFs of minimum system SFDR for –1-dBFs input at the ADC
  • 1.71 A of average active-state current consumption on 5-V nominal wall mount power supply
  • Output data rate of four lanes per ADC at 5.0 Gbps with JESD204B interface subclass-1 support

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Design Files

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TI Devices (11)

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Part Number Name Product Family Sample & Buy Design Kits & Evaluation Modules
ADS54J40  Dual-Channel, 14-Bit, 1.0-GSPS Analog-to-Digital Converter (ADC)  Analog-to-digital converters (ADCs)  Sample & Buy View Design Kits & Evaluation Modules
CSD17313Q2  30V, N ch NexFET MOSFET™, single SON2x2, 32mOhm  MOSFETs  Sample & Buy View Design Kits & Evaluation Modules
LMH2832  Fully-Differential, Dual, 1.1 GHz Digital Variable Gain Amplifier  RF & microwave  Sample & Buy View Design Kits & Evaluation Modules
LMK04828  Ultra-low jitter synthesizer & jitter cleaner  Clock jitter cleaners  Sample & Buy View Design Kits & Evaluation Modules
SN65LVDS101  2Gbps LVDS/LVPECL/CML to LVPECL Repeater/Translator  LVDS/M-LVDS/PECL  Sample & Buy View Design Kits & Evaluation Modules
SN65LVDS4  500-Mbps LVDS single high-speed transceiver  LVDS/M-LVDS/PECL  Sample & Buy View Design Kits & Evaluation Modules
TPS2400  5.5V overvoltage protection controller with 100V input transient protection  Power switches  Sample & Buy View Design Kits & Evaluation Modules
TPS54319  2.95 V to 6 V input, 3 A, 2 MHz SWIFT™ synchronous step-down converter in a 3 mm x 3 mm QFN package  Step-down (buck)  Sample & Buy View Design Kits & Evaluation Modules
TPS735  500mA, Adjustable, Low Quiescent Current, Low-Noise, High-PSRR, Single-Output LDO Regulator  Power management  Sample & Buy View Design Kits & Evaluation Modules
TPS7A47  36-V, 1-A, 4.17-μVRMS, RF low-dropout (LDO) voltage regulator  Power management  Sample & Buy View Design Kits & Evaluation Modules
TPS7A8101  Low-Noise, High-Bandwidth PSRR, Low-Dropout 1-A Linear Regulator  Power management  Sample & Buy View Design Kits & Evaluation Modules

CAD/CAE symbols

Part # Package | Pins CAD File (.bxl) STEP Model (.stp)
ADS54J40 Download -
CSD17313Q2 WSON (DQK)| 6 Download -
LMH2832 Download
LMK04828 Download Download
SN65LVDS101 Download Download
Download Download
SN65LVDS4 Download -
TPS2400 Download Download
TPS54319 Download Download
TPS735 Download Download
Download Download
TPS7A47 Download Download
TPS7A8101 Download Download

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Technical Documents

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User guides (3)
Title Type Size (KB) Date
PDF 648 26 Oct 2016
PDF 2471 12 Jan 2016
PDF 2141 27 Jan 2012
Design files (6)
Title Type Size (KB) Date
ZIP 3337 30 Jan 2017
ZIP 444 30 Jan 2017
PDF 2660 30 Jan 2017
ZIP 2005 30 Jan 2017
PDF 301 30 Jan 2017
PDF 139 30 Jan 2017
Related Tools & Software

Software (1)



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