DAC Sample and Hold Glitch Reduction Reference Design

(ACTIVE) TIPD142

Description & Features

Technical Documents

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Key Document

Description

DAC R-2R architectures display great performance in regards to noise and accuracy, but at a cost of large glitch area. This design focuses on the reduction of major-carry glitches that occur from code specific transitions in DAC R-2R architectures. This design reduces this glitch area, making it suitable for glitch-sensitive applications such as waveform generation.

Features
  • 18-bit, 0-5 V output
  • R-2R DAC with S&H Glitch Reduction Circuitry
  • <0.015 %FSR total unadjusted error
  • <2 LSB INL

View the Important Notice for TI Designs covering authorized use, intellectual property matters and disclaimers.


  



Schematic/Block Diagram

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Test Data

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Bill of Materials (BOM)

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TI Devices (3)

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Part Number Name Product Family Sample & Buy Design Kits & Evaluation Modules
DAC9881  18-bit, single-channel, low-noise, voltage output DAC for high accuracy applications  Digital-to-analog converters (DACs)  Sample & Buy View Design Kits & Evaluation Modules
OPA2192  36-V, Precision, RRIO, Low Offset Voltage, Low Input Bias Current Op Amp With e-trim  Operational amplifiers (op amps)  Sample & Buy View Design Kits & Evaluation Modules
TS12A4515  Low-Voltage, Low On-State Resistance SPST CMOS Analog Switches  Switches & multiplexers  Sample & Buy View Design Kits & Evaluation Modules

CAD/CAE symbols

Part # Package | Pins CAD File (.bxl) STEP Model (.stp)
DAC9881 Download Download
OPA2192 Download
Download
TS12A4515 Download Download
Download Download
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Technical Documents

View the Important Notice for TI Designs covering authorized use, intellectual property matters and disclaimers.

User guides (1)
Title Abstract Type Size (KB) Date
PDF 2260 10 Dec 2013
Design files (2)
Title Abstract Type Size (KB) Date
PDF 23 09 Sep 2015
PDF 57 09 Sep 2015
Related Tools & Software

Software (1)



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