Data Capture / Pattern Generator: Data Converter EVMs With 16 JESD204B Lanes From 1.6-15Gbps

(ACTIVE) TSW14J57EVM

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Description

The TI TSW14J57 evaluation module (EVM) is a next-generation data capture card used to evaluate the performance of the new TI JESD204B family of high-speed analog-to-digital converters (ADCs).

Populated with an Arria® 10 device and using the Altera® JESD204B IP solution, the TSW14J57 can be dynamically configured to support all lane speeds from 1.6 Gbps to 15 Gbps - from 1 to 16 lanes.

Together with the accompanying High-Speed Data Converter Pro (HSDC Pro) graphic user interface (GUI), it is a complete system that captures and evaluates data samples from ADC EVMs.

Features
  • Quickly evaluate JESD204B ADC performance using TI HSDC Pro software
  • Direct connection to all TI JESD204B HSDC EVMs using an FMC+ standard connector (backwards compatible to FMC-equipped EVMs)
  • JESD RX and TX IP cores with 16 routed transceiver channels; operating range from 1.6 Gbps to 15 Gbps
  • Support for SUBCLASS 0 and 1 operation
  • Onboard high-speed USB 3.0-to-parallel converter bridges the FPGA interface to the host PC and GUI
  • 16-Gb DDR4 SDRAM (split into four independent 256 × 16, 4-Gb SDRAMs; total of 1G 16-bit samples)

What's Included

  • USB cable 3.0 (6.56 ft)
  • Power cable (6 ft, 18 AWG)


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TSW14J57EVM:
Data Capture / Pattern Generator: Data Converter EVMs With 16 JESD204B Lanes From 1.6-15Gbps

$1499.00(USD)




Pricing may vary.



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TI's Standard Terms and Conditions for Evaluation Modules apply.

Technical Documents
User guides (2)
Title Abstract Type Size (KB) Date Views TI Recommends
PDF 1286 17 Apr 2017 523
PDF 16991 16 Mar 2017 2,437
Design files (1)
Title Abstract Type Size (KB) Date Views
ZIP 15960 25 May 2017 281

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