TSW4806EVM: Low Cost Programmable Clock Source

(ACTIVE) TSW4806EVM

Description & Features

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Description

The TSW4806 Evaluation Module uses a LMK04806 device, the industry's highest performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next generation system requirements. The dual loop PLL architecture enables very low jitter when used with a low noise VCXO reference source.

The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage controlled oscillator (VCO). The first PLL (PLL1) provides a low-noise jitter cleaner function while the second PLL (PLL2) performs the clock generation. PLL1 can be configured to either work with an external VCXO module or the integrated crystal oscillator with an external tunable crystal and varactor diode. When used with a very narrow loop bandwidth, PLL1 uses the superior close in phase noise (offsets below 50 kHz) of the VCXO module or the tunable crystal to clean the input clock. The output of PLL1 is used as the clean input reference to PLL2 where it locks the integrated VCO. The loop bandwidth of PLL2 can be optimized to clean the far-out phase noise (offsets above 50 kHz) where the integrated VCO outperforms the VCXO module or tunable crystal used in PLL1.

The LMK04806B provides 6 output clocks capable of jitter below 100fs rms and output frequencies up to 1300MHz (LVPECL/LVDS) and 250MHz (CMOS)

Features
  • Multi-mode: Dual PLL, single PLL, and clock distribution
  • Dual Loop PLLatinum PLL Architecture
    • PLL1
      Holdover mode when input clocks are lost
      Automatic or manual triggering/recovery
      PLL2
      Integrated Low-Noise VCO
  • 50% duty cycle output divides, 1 to 1045 (even and odd)
  • LVPECL, LVDS, or LVCMOS programmable outputs
  • Precision digital delay, fixed or dynamically adjustable
  • 25 ps step analog delay control
  • 2 differential outputs
  • 4 single-ended outputs
  • 0-delay mode
  • On board 10MHz reference oscillator
  • User friendly Graphical User Interface (GUI)


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    TSW4806EVM:
    TSW4806EVM: Low Cost Programmable Clock Source

    $249.00(USD)




    Pricing may vary.



    ACTIVE Yes   Yes   NA   NA   NA   NA   NA   NA   NA   No   No   Yes  
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    TI's Standard Terms and Conditions for Evaluation Modules apply.

    Technical Documents
    User Guides (4)
    Title Abstract Type Size (KB) Date Views
    ZIP 2318 24 Sep 2013 26
    Multiple Files   01 Feb 2013 290
    PDF 5516 17 Jan 2013 159
    PDF 920 10 Jul 2012 117
    Design Files (1)
    Title Abstract Type Size (KB) Date Views
    ZIP 2375 18 Jul 2012 44

    Software (1)


    TI Devices (4)

    Part Number Name Product Family
    LMK04803  Low Noise Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 1.9 GHz VCO   Clock Jitter Cleaners 
    LMK04805  Low Noise Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO  Clock Jitter Cleaners 
    LMK04806  Low Noise Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO   Clock Jitter Cleaners 
    LMK04808  Low-Noise Clock Jitter Cleaner with Dual Loop PLLs and Integrated 2.9 GHz VCO  Clock Jitter Cleaners 
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