See Also
- MSP-FET430UIF- MSP430 USB Debugging Interface
- TMDSADP- Adaptive Clocking JTAG Emulator Adapters
- TMDSEMU2000U- Blackhawk USB JTAG Emulator
- XDS100- XDS100 Emulators
- XDS510- XDS510 Class Emulators
Description
XDS560™ Family
The XDS560 emulator combines state-of-the-art silicon, hardware, and software technology to provide the best hardware debug capabilities. The XDS560 family of JTAG-based emulators support a wide range of TI processors and are designed for high performance applications. The XDS560 family is designed to achieve high download speeds and is ideal for larger applications.
The XDS560 family supports the full range of debugging capabilities, including software and real-time hardware breakpoints and watchpoints, single-step execution, loading / inspecting / modification of registers and memory, benchmarking, and heterogeneous multiprocessor debugging with global running, stepping and breakpoints. The XDS560 supports real-time non-intrusive Advanced Event Triggering capabilities, including event sequence detection, extended benchmarking capabilities, and program range breakpoints. All of these capabilities are fully integrated with the Code Composer Studio™ IDE debugger interface.
XDS560 Emulator
The XDS560 JTAG emulator products are available with popular host interfaces such as PCI bus and USB. They support voltages ranging from 0.5 to 5V, thus offering excellent support for TI's low-voltage devices.
The USB emulator product (TMDSEMU560U) is supplied with the appropriate power supply, USB cable, 12-inch compact 20-pin TI JTAG cable with embedded XDS560 Revision D cable electronics. The PCI emulator product (TMDSEMU560PCI) is supplied with the 5-foot (1.5m) XDS560 Revision D cable with 20-pin compact TI header. Both models include pin adapters for 14-pin TI, 20-pin ARM multi-ICE headers and 60-pin TI connectors. The revision D cable electronics provide support for adaptive clocking, thus enabling improved ARM(R) processor support.
The Blackhawk XDS560 JTAG emulators can support Boundary-Scan Definition Language (BSDL). BSDL is the standard modeling language for boundary-scan devices. Its syntax is a subset of VHDL and it complies with IEEE 1149.1-2001. Corelis, a leader in boundary scan tools , has provided support for Blackhawk XDS560-class JTAG emulators in its ScanExpress Programmer which extends the usefulness of Blackhawk JTAG emulators beyond debug for interconnect testing and JTAG in-system programming.
XDS560v2 System Trace
The XDS560v2 System Trace Emulator (TMDSEMU560v2STM-UE) is the latest in the XDS560 family of high-performance debug test controllers (emulators) for TI processors. The XDS560v2 System Trace supports both traditional IEEE 1149.1 (JTAG) emulation and the recently ratified IEEE 1149.7. The XDS560v2 System Trace emulator features a standard 60-pin MIPI HSPT header at the end of a 12.5-inch (31mm) detachable cable. This 60-pin MIPI HSPT header allows the user to either connect to a 60-pin MIPI HSPT target connector, or attach one of four included modular target configuration adapters to mate with any one for the following JTAG connectors; 14-pin TI, compact 20-pin TI, 60-pin TI, and 20-pin ARM. Target board JTAG interface levels of +1.2v to +4.1v are supported with this emulator.
The XDS560v2 System Trace emulator is the first XDS560 class emulator to provide System Trace (STM) capability. The product provides This state of the art development tool provides a USB 2.0 high speed (480 mbit/sec) and Ethernet(10/100) connection to the host computer for high speed data transfers and debugging. The Ethernet connection allows remote debug capability enabling worldwide development teams to share hardware cards without the expense and hassle of a shared computer.
The System Trace capability is compliant to MIPI STP and is available with devices which feature the TI CTools debug capability. The System Trace capability provided by the TI CTools enabled devices facilitates the debugging and optimization of multi-core devices. The System Trace capability aids users in understanding the synchronization and timing between cores and peripherals as well as the performance of cores and key device interfaces. The XDS560v2 System Trace emulator features 128MB of system trace storage and can support 1-4 pins of System Trace capture. More details about TI CTools capability can be found at http://processors.wiki.ti.com/index.php/CTools.
The XDS560v2 System Trace unit is fully compatible with TI’s Code Composer Studio™ IDE version 4.2 and newer. This combination gives the user a complete robust tool chain for hardware debug and algorithm development. The combination of the XDS560v2 System Trace emulator and Code Composer Studio IDE gives a complete hardware development environment which includes an Integrated Debug Environment, Compiler, and full hardware debugging and system trace capability on selected processors.
The following TI processor families are supported by the XDS560v2 System Trace emulator:- OMAP™ Application Processors
- Sitara™ ARM® MPUs
- DaVinci™ Digital Media Processors
- C6000™ High-Performance DSPs
- C5000™ Low-Power DSPs
- C28xxx Digital Control Processors
- ARM® Cortex™ A / R / M Microprocessors
- ARM9™ / 11 Microprocessors
A robust external international power supply with three power options.
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