Power Supply Design Seminar

Since its introduction in 1977, the Power Supply Design Seminar series provides rich, technical and practical presentations which combine new advanced power supply concepts, basic design principles and "real-world" application examples. Whether this seminar is used to gain fresh knowledge of power supply design, or as a review for those experienced in power supply design, the topics presented will be worthwhile for all levels of expertise.

Registration includes:

  • Power Supply Design training by TI Experts
  • Seminar material workbook
  • Presentation workbook
  • Refreshments and lunch

Locations and Dates:

Location Date
Shanghai 3/13/2018
Shenzhen 3/15/2018
Guangzhou 3/20/2018
Seoul 3/21/2018
Beijing 3/22/2018
Taipei 3/23/2018
PSDS 2018 Agenda: Beijing, Shanghai, Guangzhou, Shenzhen
8:30 to 9 a.m. Welcome and badge pick up
9 to 10 a.m. Survey of Resonant Converter Topologies
10 to 11 a.m. Control and Design Challenges for Synchronous Rectifiers
Break (11 to 11:15 a.m.)
11:15 a.m. to 12:15 p.m. Comparison of GaN and Silicon FET-Based Active Clamp Flyback Converters
  Working lunch (12:15 to 1 p.m.)
1 to 1:30 p.m. Power Design Made Easy with Power Stage Designer™
Break (1:30 to 1:45 p.m.)
1:45 to 2:45 p.m. Power Solutions for Class-D Audio Amplifiers
2:45 to 3:45 p.m. Common Mistakes in DC/DC Converters and How to Fix Them
Break (3:45 to 4 p.m.)
4 to 5 p.m. Considerations for Measuring Loop Gain in Power Supplies
PSDS 2018 Agenda: Taipei
8:30 to 9 a.m. Welcome and badge pick up
9 to 10 a.m. Survey of Resonant Converter Topologies
10 to 11 a.m. Control and Design Challenges for Synchronous Rectifiers
Break (11 to 11:15 a.m.)
11:15 a.m. to 12:15 p.m. Comparison of GaN and Silicon FET-Based Active Clamp Flyback Converters
  Lunch (12:15 to 1 p.m.)
1 to 1:30 p.m. Power Design Made Easy with Power Stage Designer™
Break (1:30 to 1:45 p.m.)
1:45 to 2:45 p.m. Power Solutions for Class-D Audio Amplifiers
2:45 to 3:45 p.m. Common Mistakes in DC/DC Converters and How to Fix Them
Break (3:45 to 4 p.m.)
4 to 5 p.m. Considerations for Measuring Loop Gain in Power Supplies
PSDS 2018 Agenda: Seoul
8:30 to 9 a.m. Welcome and badge pick up
9 to 10 a.m. Survey of Resonant Converter Topologies
10 to 11 a.m. Control and Design Challenges for Synchronous Rectifiers
Break (11 to 11:15 a.m.)
11:15 a.m. to 12:15 p.m. Comparison of GaN and Silicon FET-Based Active Clamp Flyback Converters
  Lunch (12:15 to 1:15 p.m.)
1:15 to 1:45 p.m. Power Design Made Easy with Power Stage Designer™
Break (1:45 to 2 p.m.)
2 to 3 p.m. Power Solutions for Class-D Audio Amplifiers
3 to 4 p.m. Common Mistakes in DC/DC Converters and How to Fix Them
Break (4 to 4:15 p.m.)
4:15 to 5:15 p.m. Considerations for Measuring Loop Gain in Power Supplies