Analog for Xilinx FPGAs

Texas Instruments is the approved and tested vendor for the analog solution around the Xilinx® FPGAs and CPLDs. TI works closely with Xilinx® to recommend the best power management, clocking, data converter, and other analog solutions for a wide variety of applications

Analog for Xilinx FPGAs Analog for Xilinx FPGAs
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Clock solutions for Xilinx FPGAs

With the continued increase in clock rate and integration of high speed SerDes in FPGAs, the need for high performance and flexible clocking becomes ever so critical. Today's FPGAs need to support high speed data transmission in excess of 20 Gbps per lane and core clock rates of over 1 GHz, which significantly reduces the timing error margin for clocks.

TI can meet these demands with a full portfolio of low noise clock jitter cleaners, generators and buffers as well as offering a range of software-programmable, EEPROM or pin-mode configurable clocks that deliver a great level of flexibility for almost any application environment.

Key portfolio highlights:

  • Clock buffers ranging from ultra-low noise to low power
    • Lowest additive noise with <25 fs RMS
    • Pin-programmable outputs for ultimate flexibility
  • Clock generators for replacing crystals and oscillators
    • Industry's lowest jitter with 100 fs RMS satisfies stringent protocols (10GbE, XAUII, FC, SATA/SAS, etc.)
    • Low power multi-PLL clocks for consumer and industrial applications
  • Clock jitter cleaners/attenuators to maximize performance
    • Industry's lowest jitter with <50 fs RMS
    • Cascaded PLL architecture enables lower total solution BOM
  • WEBENCH® Clock Architect accelerates time-to-market
    • Enter requirements, select from suggested solutions, and simulate design
    • Build a complete, optimized clock tree in minutes

Clock recommendations for Xilinx

Requirement Virtex®-7
VC707
Kintex®-7
KC705
Artix®-7
AC701
Zynq®-7000
ZC702
Frequency (MHz) Output Type Features Recommended Clocks
System Clock 200 LVDS Fixed frequency CDCM6208
SGMII GTX Clock   125 LVDS Fixed frequency
PS Clock       33.3333 CMOS Fixed frequency
User Clock 156.25 LVDS User-configurable via I2C: 10 to 810 MHz
Jitter-Attenuated
Clock
  Up to 2600 LVDS CPRI/OBSAI reference LMK04906

 




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