customize
Design Rule Verification Report
Date
:
7/1/2014
Time
:
3:00:28 PM
Elapsed Time
:
00:00:04
Filename
:
D:\TIDA-00182\Completed_E1\Backup\TIDA-00182.PcbDoc
Warnings
:
0
Rule Violations
:
4
Summary
Warnings
Count
Total
0
Rule Violations
Count
Clearance Constraint (Gap=30mil) (InPolygon),(All)
0
Clearance Constraint (Gap=12mil) (All),(All)
0
Width Constraint (Min=15mil) (Max=100mil) (Preferred=40mil) (All)
0
Power Plane Connect Rule(Relief Connect )(Expansion=10mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)
0
Routing Layers(All)
0
Routing Via (MinHoleWidth=16mil) (MaxHoleWidth=20mil) (PreferredHoleWidth=20mil) (MinWidth=30mil) (MaxWidth=40mil) (PreferedWidth=40mil) (All)
0
Short-Circuit Constraint (Allowed=No) (All),(All)
0
Un-Routed Net Constraint ( (All) )
0
Minimum Annular Ring (Minimum=5.905mil) (IsVia and InAnyComponent)
0
Minimum Annular Ring (Minimum=9mil) (All)
0
Hole Size Constraint (Min=8mil) (Max=251mil) (All)
0
Hole To Hole Clearance (Gap=10mil) (All),(All)
0
Net Antennae (Tolerance=0mil) (All)
0
Clearance Constraint (Gap=12mil) (IsVia),(IsVia)
0
Clearance Constraint (Gap=12mil) (IsVia),(IsSMTPin)
4
Total
4
Clearance Constraint (Gap=12mil) (IsVia),(IsSMTPin)
Via (580mil,2520mil) Top Layer to Bottom Layer
Pad Q1-9(641.862mil,2450mil) Top Layer
Via (680mil,2520mil) Top Layer to Bottom Layer
Pad Q1-9(641.862mil,2450mil) Top Layer
Via (580mil,2380mil) Top Layer to Bottom Layer
Pad Q1-9(641.862mil,2450mil) Top Layer
Via (680mil,2380mil) Top Layer to Bottom Layer
Pad Q1-9(641.862mil,2450mil) Top Layer
Back to top