The PMP10962 reference design is a 3-phase PMBus converter for high current ASIC core rail regulation. It employs DCAP+ control for fast transient response and TI's proprietary AutoBalance for tight steady and dynamic phase-to-phase current balance. It drives three TI NexFET smart power stages for high power density and efficiency. It easily scales-up/scales-down to meet a wide load range. PMBus capability and on-board NVM enable easy design, configuration, and customization, with telemetry of output voltage, current, temperature, and power.
| Output voltage options | PMP10962.1 |
|---|---|
| Vin (Min) (V) | 7 |
| Vin (Max) (V) | 13.2 |
| Vout (Nom) (V) | 1 |
| Iout (Max) (A) | 90 |
| Output Power (W) | 90 |
| Isolated/Non-Isolated | Non-Isolated |
| Input Type | DC |
| Topology | Buck- Multiphase^Buck- Synchronous |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
Download ready-to-use system files to speed your design process.
Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Test report | PMP10962 Test Results | Aug. 26, 2015 |
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