Visit TI at International Microwave Symposium (IMS)

15 - 20 June | San Fancisco, CA

Moscone Center, Booth 355

TI at IMS 2025

Pushing the frontiers of RF innovation

Explore our latest RF advancements which set the standards for the lowest phase noise, highest SNR and best SWaP-C for aerospace and defense, test and measurement, and wireless infrastructure applications. From phased array radars, satellite payloads, software defined radios to massive MIMO and RF signal generators, our data converters, clocking and amplifier solutions take your signals from DC to Ka-band and even beyond to mmWave, while meeting your most demanding system level design challenges.    

Time
Location/Session
Session title
Speaker
8:00am - 5:20pm

Room 201 / Workshop

WSA: Frequency Synthesizer Design — from Fundamentals to Advanced Techniques

WSA-1: Reference Oscillator Architectures and Design Considerations

Abstract: Frequency synthesizers require a stable, low noise reference clock. For RF applications, this clock is generated with a crystal or MEMS oscillator, due to the high-Q resonance enabling reference clocks with low phase noise and high stability. This talk will describe the important specifications and tradeoffs for reference oscillator design, including phase noise, frequency stability, frequency tuning range and resolution, startup behavior, amplitude regulation, and power consumption. Possible architectures and design choices for both crystal and MEMs oscillators will be presented, highlighting state-of-the-art techniques.

 Danielle Griffith
8:00am - 5:20pm

Room 603 / Workshop

WSL: Sub-THz Power Amplifiers in CMOS, SiGe and III-V

WSL-7: Sub-THz SiGe HBT Cascode Power Amplifiers with Capacitive Feedback and its Use in a Supply Modulated RF Transmitter Front-End

Abstract: An alternate approach to boost the gain of SiGe HBT amplifiers operating above 250GHz using capacitive feedback is demonstrated in a four-stage cascode power amplifier. Unlike the inductive feedback for MOS cascode amplifiers operating at ~200GHz, the capacitive feedback provides higher gain (higher by ~4dB) at frequencies higher than ~250GHz due to the inherent parasitic inductance of the interconnect between the collector of common-emitter (C-E) stage and the emitter of the common-base (C-B) stage of HBT cascode amplifiers. A PA using this technique is integrated in a transmitter with its fourth stage supply-modulated using a high-speed low-dropout regulator (LDO) to boost its peak modulated power by 3× and RF-to-DC efficiency by 2× at 250GHz.

 Suprovo Ghosh
Complete IMS Technical program overview can be found here.
Time
Location/Session
Session title
Speaker
8:00am - 5:20pm

Room 314 / Workshop

WMO: Unseen Insights: Radar and the Future of Human Sensing

WMO-8: In-Cabin Radar Sensing

Abstract: This presentation highlights advances in mm-wave radar technology for in-cabin automotive applications, including life presence detection, child presence classification, and seat belt reminders. It explores signal processing algorithms, results, and future challenges.

 Anand Dabak
Time
Location/Session
Session title
Speaker
10:00am - 10:15am Microapps Theater, Booth 5423 / TUMA3

Faster Frequency Switching in Space Qualified K-Band PLL

Abstract: Frequency hopping between multiple LO frequencies find application in downconverter and upconverter chain where switching time expected is very low. Frequency Switching time in PLL based synthesizers containing integrated VCOs/Multipliers is dominated by VCO/Multiplier calibration time. During the calibration time, output frequency can vary a lot, which is undesired. Proposed FULL ASSIST solution in LMX26xx reduces calibration time to zero by forcing the settings related to frequency switch, all at one go using double buffering registers and thus avoids cycle slipping. With this feature in LMX26xx, overall lock time depends only on minimal register writes and analog loop settling.

 Narala Raghavendra Reddy
10:30am - 10:45am Microapps Theater, Booth 5423 / TUMA5

Solving PLL Synthesizer Fast Frequency Switching Challenges for EW Applications

Abstract: Frequency hopping across wide frequency range find application in multiple systems used in electronic warfare, defense radio, and communications where switching time expected is very low. The Link-16 network used by NATO for transferring real-time tactical information requires frequency hopping under 13 µs. Frequency Switching time in PLL based synthesizers containing integrated VCOs is dominated by VCO calibration time which can go as high as 200 us depending on the capacitor bank in VCOs. Proposed instant calibration feature in LMX2820 reduces the VCO calibration time to 5 us across the wideband frequency range from 45 MHz to 22.6 GHz.

Narala Raghavendra
Reddy

Dean Banerjee

4:00pm - 4:15pm
Microapps Theater, Booth 5423 /  TUMA24

JESD204B/C Compliant Clock Distributions in Large Array Cascaded Systems

Abstract: Large phased array systems include multiple RF sampling data converters, which require high precision synchronization to achieve proper beam steering. Synchronization can be achieved by properly aligning the device clocks and phase adjustability of SYSREFs to the data converters for meeting setup and hold time. SYSREFs in large array system can be generated or distributed on tile level, sub-system level and from the host in continuous, pulsed or burst mode. This presentation proposes the JESD204B/C clock buffer-based solution for precise SYSREFs phase alignment and distribution for synchronization up to X-band sampling clocks.

Ajeet Pal

Harish Ramesh

Jason Xavier
Time
Location/Session
Session title
Speaker
12:45pm - 1:00pm Microapps Theater,      Booth 5423 / THMA14

Using X band RF Buffers with Sub-Picosecond Noiseless Delays to Mitigate Trace/Cable Mismatches

Abstract: New RF buffers have noiseless delays that can achieve 0.5 ps steps and up to 50 ps range. With such delays one can tune out mismatches due to board imperfections, cable/connector mismatches, and other factors. Phase array radar systems

Dean Banerjee

Ajeet Pal

Harish Ramesh

1:30pm - 3:10pm

Room 211 / Technical Sessions / Th3F

 

Chair organization by Texas Instruments / Zheng Liu

AI for Design and Optimization of RFICs and Arrays

 Various Companies and Universities