TI Precision Labs Seminar

Deepen your analog signal chain knowledge at our in-person sessions

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Attend a TI Precision Labs Seminar in person

TI Precision Labs (TIPL) is the most comprehensive classroom for analog signal chain designers that covers everything from foundational knowledge to advanced concepts. Whether you’re new to the industry or just looking to brush-up on analog topics, TI Precision Labs Seminar will deepen the technical expertise of experienced engineers and accelerate the development of those early in their career. Join our industry experts as they guide you through various topics, and become an expert yourself. Can't join one of the TIPL Seminars in person? Watch on-demand training 24/7.

 

Location & registration information

Session
Date
Registration link
Santa Clara, USA
June 25, 2026 Register now
Taipei, Taiwan September, 2026 Coming soon
Paris, France September, 2026 Coming soon
Shenzhen, China October 2026 Coming soon
Suzhou, China
October 2026 Coming soon

 

Session details

Fundamentals

Amplifier fundamentals and specifications

This session provides guidance on predicting errors due to Vos, Ib and temperature drift, along with an explanation of their internal origins. It also includes an overview of dynamic behaviors such as Iq, slew rate and bandwidth, followed by a discussion on datasheet parameter specifications.

DAC and ADC fundamentals

The presentation will first introduce resolution and LSB size and how they relate to the DAC and ADC transfer function. The presentation will continue with an in-depth introduction to transfer function error sources including gain and offset error, zero-code error and full-scale error, and DNL, INL, and TUE. The presentation will feature descriptions of the errors, why the errors occur, and examples on addressing error sources in applications

Instrumentation amplifiers, difference amplifiers and comparators

This session addresses error sources in instrumentation amplifiers (INA), including Vos, IB, gain error and temperature drift. It also covers dynamic performance aspects such as bandwidth and slew rate for both voltage and current feedback INAs. Additionally, the session demonstrates the verification of input common mode using software tools and discusses error sources and limitations for comparators.

Precision ADC architectures: understanding latency and calculating noise

This session introduces two important ADC concepts: conversion latency and signal chain noise. First, differences between SAR and delta-sigma ADC conversion latency are discussed – with an emphasis on the impact of digital filters – and calculations are provided. Then, ADC, amplifier, and voltage reference noise concepts are introduced, as well as a methodology for calculating total signal chain noise. Both topics use a precision voltmeter reference design as an example of how to apply these core ADC concepts to a real-world system

Advanced

Advanced understanding of DAC dynamic output behaviors

This presentation will discuss DAC architectures and will cover advanced DAC dynamic behavior topics such as DAC noise sources (reference noise, buffer noise, and thermal noise), settling time including current-limited capacitive loads, and output glitch. The presentation will address glitch in string vs R2R DACs, new vs legacy DACs, and DACs with integrated track-and-hold capabilities. This presentation will close with a discussion on how DAC dynamic behaviors appear as sources of distortion (THD+N) when generating waveforms with high resolution DACs as well as introduce strategies to improve dynamic performance.

Amplifier input voltage noise, input current noise and filtering techniques

This session explores common sources of noise and filtering techniques, covering calculations, simulations and theory. It includes predictions of amplifier and resistor noise through calculation and simulation and defines noise gain, noise bandwidth, current and voltage noise spectral density and total RMS noise. The session also explains flicker and broadband noise, and compares real-world measurements to calculations.

Driving SAR and Delta-Sigma ADC inputs

In this presentation, you will learn how to choose the input amplifier and filter values to obtain best in class AC and DC performance from your SAR or Delta-Sigma Precision ADC.  We will discuss a simplified design approach that quickly determines the values of the input filter and the bandwidth requirements of the input amplifier.  We will also look at the amplifier requirements from the input signal perspective, and how to maintain ADC specifications over the desired input bandwidth range.  The final part of this presentation will cover several practical circuit examples to emphasize the design procedure.

Amplifier circuit stability analysis and compensation schemes

This session covers circuit design techniques to improve stability, addressing issues like driving capacitive loads or excessive capacitance on an op amp’s inverting node, which can lead to oscillations. The presentation demonstrates how to predict amplifier stability using simulation and discusses methods for correcting stability issues.