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Clocks & timing

Clock jitter cleaners & synchronizers – Design & development

Featured evaluation modules

LMK04610EVM

Evaluation module for our ultra-low noise and low-power JESD204B-compliant dual-loop jitter cleaner

LMK04828BEVM

Evaluation module for our ultra-low jitter synthesizer and jitter cleaner

LMK04906BEVAL

Evaluation module for our low-noise clock jitter cleaner and multiplier with 6 programmable outputs

LMK04816BEVAL

Evaluation module for our 3-input low-noise clock jitter cleaner with dual-loop PLLs

LMK04808BEVAL

Evaluation module for our low-noise clock jitter cleaner with dual-loop PLLs and integrated VCO

Featured reference designs

Featured tools & software

Texas Instruments clocks & synthesizers (TICS) pro software

Use our TICSPRO-SW software to program the evaluation modules (EVMs) for our PLLs and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

Clock tree architect

Create and compare multi-chip, system-level clock trees to meet your design requirements.