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Clocks & timing

Optimize system-level performance with our clocks & timing devices

A broad portfolio of flexible devices to reduce jitter and simplify your design

Get the best performance in your design with our broad portfolio of low-jitter, easy-to-use clocks and timing devices. Our portfolio allows you to build your clock tree with simple, discrete devices or highly-integrated solutions to solve your system timing needs. Learn how our devices enable industry-leading performance in a variety of applications.

Clock buffers

Clock buffers with low additive jitter performance and output skew and a high operating temperature range for industry-standard output formats including LVCMOS, LVDS, LVPECL and HCSL.

RF PLLs & synthesizers

Wideband, low-phase noise, high-performance solutions for applications that need low-power RF signaling.

Clock jitter cleaners & synchronizers

Low-power network synchronizers and lowest jitter, JESD204B-compliant jitter cleaners with internal phased-locked loops (PLLs) to reduce phase noise or jitter in the system.

Clock generators

Flexible and easy-to-use high-performance single or multiple PLL solutions for clocking high-speed serial links including PCI Express (PCIe).


Standard and programmable oscillators with less than 100 fs RMS jitter in industry-standard packages.

RTCs & timers

Real-time clocks (RTCs) and timers for optimizing system power consumption with support for long-timer monitoring and accurate clocking.

Build your expertise with TI Precision Labs - Clocks & Timing videos

Develop your clocks and timing expertise with our comprehensive curriculum of training videos that cover key topics from fundamental terminology and factors of system noise to more advanced design considerations.

Featured clocks & timing tools

TICS Pro Software

Program EVMs for PLLs, voltage-controlled oscillators, synthesizers and clocks.

PLLatinum Simulator Tool

Create detailed designs and simulations of our LMX series of PLLs and synthesizers.

Clock Design Tool

Design a loop filter for optimal phase noise and jitter.