SBAS511C July   2010  – January 2018 ADS1013-Q1 , ADS1014-Q1 , ADS1015-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Block Diagrams
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: I2C
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Multiplexer
      2. 8.3.2 Analog Inputs
      3. 8.3.3 Full-Scale Range (FSR) and LSB Size
      4. 8.3.4 Voltage Reference
      5. 8.3.5 Oscillator
      6. 8.3.6 Output Data Rate and Conversion Time
      7. 8.3.7 Digital Comparator (ADS1014-Q1 and ADS1015-Q1 Only)
      8. 8.3.8 Conversion Ready Pin (ADS1014-Q1 and ADS1015-Q1 Only)
      9. 8.3.9 SMbus Alert Response
    4. 8.4 Device Functional Modes
      1. 8.4.1 Reset and Power-Up
      2. 8.4.2 Operating Modes
        1. 8.4.2.1 Single-Shot Mode
        2. 8.4.2.2 Continuous-Conversion Mode
      3. 8.4.3 Duty Cycling For Low Power
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
        1. 8.5.1.1 I2C Address Selection
        2. 8.5.1.2 I2C General Call
        3. 8.5.1.3 I2C Speed Modes
      2. 8.5.2 Slave Mode Operations
        1. 8.5.2.1 Receive Mode
        2. 8.5.2.2 Transmit Mode
      3. 8.5.3 Writing To and Reading From the Registers
      4. 8.5.4 Data Format
    6. 8.6 Register Map
      1. 8.6.1 Address Pointer Register (address = N/A) [reset = N/A]
        1. Table 4. Address Pointer Register Field Descriptions
      2. 8.6.2 Conversion Register (P[1:0] = 0h) [reset = 0000h]
        1. Table 5. Conversion Register Field Descriptions
      3. 8.6.3 Config Register (P[1:0] = 1h) [reset = 8583h]
        1. Table 6. Config Register Field Descriptions
      4. 8.6.4 Lo_thresh (P[1:0] = 2h) [reset = 8000h] and Hi_thresh (P[1:0] = 3h) [reset = 7FFFh] Registers
        1. Table 7. Lo_thresh and Hi_thresh Register Field Descriptions
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Connections
      2. 9.1.2 Single-Ended Inputs
      3. 9.1.3 Input Protection
      4. 9.1.4 Unused Inputs and Outputs
      5. 9.1.5 Analog Input Filtering
      6. 9.1.6 Connecting Multiple Devices
      7. 9.1.7 Quickstart Guide
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Shunt Resistor Considerations
        2. 9.2.2.2 Operational Amplifier Considerations
        3. 9.2.2.3 ADC Input Common-Mode Considerations
        4. 9.2.2.4 Resistor (R1, R2, R3, R4) Considerations
        5. 9.2.2.5 Noise and Input Impedance Considerations
        6. 9.2.2.6 First-order RC Filter Considerations
        7. 9.2.2.7 Circuit Implementation
        8. 9.2.2.8 Results Summary
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-Supply Sequencing
    2. 10.2 Power-Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from B Revision (December 2016) to C Revision

  • Changed Digital input voltage max value from VDD + 0.3 V to 5.5 V in Absolute Maximum Ratings tableGo
  • Added "over temperature" to Offset drift parameter for clarityGo
  • Added Long-term offset drift parameter in Electrical Characteristics tableGo
  • Added "over temperature" to Gain drift parameter for clarityGo
  • Added Long-term gain drift parameter in Electrical Characteristics tableGo
  • Added Output Data Rate and Conversion Time section for clarity.Go
  • Changed Figure 13, ALERT Pin Timing Diagram for clarityGo
  • Changed Figure 24, Typical Connections of the ADS1015-Q1 for clarityGo

Changes from A Revision (March 2016) to B Revision

  • Added ADS1014-Q1 and ADS1013-Q1 to data sheetGo
  • Changed Title, and Description, Features, and Applications sections for clarityGo
  • Deleted temperature range text from Description section and moved to Features sectionGo
  • Changed Device Comparison TableGo
  • Changed Pin Functions table for clarityGo
  • Changed Power-supply voltage max value from 5.5 V to 7 V in Absolute Maximum Ratings tableGo
  • Changed Analog input voltage from –0.3 V to GND – 0.3 V in Absolute Maximum Ratings tableGo
  • Changed Digital input voltage min value from –0.5 V to GND – 0.3 V in Absolute Maximum Ratings tableGo
  • Changed Digital input voltage max value from 5.5 V to VDD + 0.3 V in Absolute Maximum Ratings tableGo
  • Deleted Analog input current rows in Absolute Maximum Ratings tableGo
  • Added Input current row in Absolute Maximum Ratings tableGo
  • Added Operating temperature range of –40°C to +125°C back into Absolute Maximum Ratings tableGo
  • Added minimum specification of –40°C for TJ in Absolute Maximum Ratings table Go
  • Deleted Machine model row from ESD Ratings tableGo
  • Deleted Supply current and power dissipation rows and moved to Electrical Characteristics tableGo
  • Changed Full-scale input voltage range (FSR) from typical value of ±4.096/PGA V to min value of ±0.256 V and max value of ±6.144 V for clarity in Recommended Operating Conditions tableGo
  • Added Digital input voltage (VDIG) to Recommended Operating Conditions table Go
  • Changed VDIG max value from VDD to 5.5 V in Recommended Operating Conditions table Go
  • Added new note 1 for Recommended Operating Conditions tableGo
  • Changed text in note 2 (previously note 1 in revision A) from "In no event should more than VDD + 0.3 V be applied to this device" to "No more than VDD + 0.3 V or 5.5 V (whichever is smaller) must be applied to this device. See Table 3 for more information."Go
  • Added values for ADS101xA-Q1 devices in Thermal Information tableGo
  • Added values for ADS101xB-Q1 devices in Thermal Information tableGo
  • Changed existing thermal information values for ADS1015-Q1 (RθJA from 175.2 to 182.7, RθJC(top) from 64 to 67.2, RθJB from 96.4 to 103.8, ψJT from 8.8 to 10.2, ψJB from 94.8 to 102.1)Go
  • Changed Electrical Characteristics table conditions line for clarityGo
  • Changed all instances of "FS" to "FSR"Go
  • Deleted FSR from Electrical Characteristics and moved to Recommended Operating Conditions tableGo
  • Added values from Table 1 to Differential input impedance parameter in Electrical CharacteristicsGo
  • Deleted Output noise parameter from Electrical CharacteristicsGo
  • Changed Offset error parameter min value from empty to –3, and max value from ±3 to 3 for clarity in Electrical Characteristics tableGo
  • Changed VIH parameter max value from 5.5 V to VDD in Electrical Characteristics tableGo
  • Changed VIH parameter max value from VDD to 5.5 V in Electrical Characteristics tableGo
  • Changed VIL parameter min value from GND – 0.5 V to GND in Electrical Characteristics tableGo
  • Changed Input leakage current parameters from two rows to one row, changed test conditions from VIH = 5.5V and VIL = GND to GND < VDIG < VDD, and changed min value from 10 µA to –10 µA in Electrical Characteristics tableGo
  • Added Supply current parameters to Electrical Characteristics tableGo
  • Added Power dissipation parameters to Electrical Characteristics tableGo
  • Changed text in note 1 of Electrical Characteristics table from "In no event should more than VDD + 0.3 V be applied to this device" to "No more than VDD + 0.3 V or 5.5 V (whichever is smaller) must be applied to this device. See Table 1 for more information."Go
  • Added condition statement in Timing Requirements: I2CGo
  • Added note 1 to Timing Requirements tableGo
  • Deleted Figure 7, Noise PlotGo
  • Changed functional block diagram; deleted "Gain = 2/3, 1, 2, 4, 8, or 16" from figure Go
  • Added Functional Block Diagrams for ADS1014-Q1 and ADS1013-Q1Go
  • Changed Analog Inputs section to provide LSB size information instead of PGA settingGo
  • Changed Full-Scale Input section title to Full-Scale Range (FSR) and LSB Size, and updated section for clarityGo
  • Added Voltage Reference and Oscillator sectionsGo
  • Changed Comparator section title to Digital Comparator, and updated section for clarity.Go
  • Changed Conversion Ready Pin section for clarityGo
  • Changed Register Map section for clarityGo
  • Changed Application Information section for clarityGo
  • Added Input Protection sectionGo
  • Added Unused Inputs and Outputs sectionGo
  • Changed Aliasing section title to Analog Input Filtering and updated section for clarityGo
  • Deleted previous Typical Application section and added new, more detailed Typical Application sectionGo
  • Changed Power Supply Recommendations section for clarityGo
  • Changed Layout section for clarityGo

Changes from * Revision (July 2010) to A Revision

  • Added ADS1015AQDGSRQ1 package option to the data sheetGo
  • Added ESD Ratings table, and Pin Configuration and Functions, Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, LayoutDevice and Documentation Support, and Mechanical, Packaging, and Orderable Information sectionsGo
  • Deleted Ordering Information table Go
  • Changed Figure 3; switched VDD = 5 V and VDD = 2 V series labels in Power-Down Current vs Temperature graphGo
  • Deleted Figure 22, Connecting Multiple Device TypesGo