This section provides a brief example of ADS101x-Q1 communications. See subsequent sections of this data sheet for more detailed explanations. Hardware for this design includes: one ADS101x-Q1 configured with an I2C address of 1001000; a microcontroller with an I2C interface; discrete components such as resistors, capacitors, and serial connectors; and a 2 V to 5 V power supply. Figure 28 shows the basic hardware configuration.
The ADS101x-Q1 communicate with the master (microcontroller) through an I2C interface. The master provides a clock signal on the SCL pin and data are transferred using the SDA pin. The ADS101x-Q1 never drive the SCL pin. For information on programming and debugging the microcontroller being used, see the device-specific product data sheet.
The first byte sent by the master is the ADS101x-Q1 address, followed by the R/W bit that instructs the ADS101x-Q1 to listen for a subsequent byte. The second byte is the Address Pointer register byte. The third and fourth bytes sent from the master are written to the register indicated in register address pointer bits P[1:0]. See Figure 15 and Figure 16 for read and write operation timing diagrams, respectively. All read and write transactions with the ADS101x-Q1 must be preceded by a START condition, and followed by a STOP condition.
For example, to write to the configuration register to set the ADS101x-Q1 to continuous-conversion mode and then read the conversion result, send the following bytes in this order: