Figure 10-13 is a fault-protected, filtered, 3-wire RTD application circuit with hardware-based, lead-wire compensation. Two IDAC current sources provide the lead-wire compensation. One IDAC current source (IDAC1) provides excitation to the RTD element. The ADC reference voltage input (pins AIN2 and AIN3) is derived from the same current by resistor RREF, providing ratiometric cancellation of current-source drift. The other current source (IDAC2) has the same current setting, providing cancellation of lead-wire resistance by generating a voltage drop across lead-wire resistance RLEAD2 equal to the voltage drop of RLEAD1. Because the RRTD voltage is measured differentially at ADC pins AIN4 and AIN5, the voltages across the lead wire resistance cancel. Resister RBIAS level-shifts the RTD signal to within the ADC specified input range. The current sources are provided by two additional pins (AIN1 and AIN6) that connect to the RTD through blocking diodes. The additional pins are used to route the RTD excitation currents around the input resistors, avoiding the voltage drop otherwise caused by the filter resistors RF1 and RF4. The diodes protect the ADC inputs in the event of a miswired connection. The input filter resistors limit the input fault currents flowing into the ADC.