The low-pass filtering effect of the sinc filter sets the overall frequency response of the ADC. The frequency response of data rates 14400 SPS, 19200 SPS and 38400 SPS is that of the first filter stage. The frequency response of data rates 2.5 SPS ranging to 7200 SPS is the product of the first and second stage individual frequency responses. The overall filter response is given in Equation 14:
The digital filter attenuates out-of-band noise that is present in the signal, and noise within the PGA and ADC modulator. Adjusting the filter by changing the decimation ratio and sinc order changes the filter bandwidth. Tradeoffs are made between signal bandwidth, noise, and filter latency.
As shown in Figure 9-14 and Figure 9-15, the first-stage sinc5 filter has frequency response nulls occurring at the data rate (fMOD / A) and at data rate multiples. At the null frequencies, the filter has zero gain.
The second stage superimposes new nulls in the frequency response over the nulls produced by the first stage. The first of the superimposed frequency response nulls occur at the output data rate, followed by nulls occurring at data rate multiples.
Figure 9-16 illustrates the frequency response of data rate 2400 SPS produced by the combined filter stages. This data rate has five equally-spaced nulls between the larger nulls produced by the first stage. The frequency response is also characteristic of data rates 2.5 SPS to 7200 SPS that are also produced by the second-stage filter. Figure 9-17 shows the frequency response nulls for 10 SPS.
Figure 9-18 and Figure 9-19 illustrate the frequency response of data rates 50 SPS and 60 SPS. The frequency response is plotted out to the 50-Hz 12th harmonic (10th harmonic for 60 Hz). The 50-Hz or 60-Hz fundamental frequency and harmonics are suppressed by increasing the second-stage filter order, as shown in the figures.
Figure 9-20 and Figure 9-21 plot the detailed frequency response of 50-SPS and 60-SPS data rates of different sinc-filter orders. Note that the high-order sinc filter increases the width of the null and improves line cycle rejection. The high-order filter decreases the sensitivity of the ratio tolerance between the ADC clock frequency and the line frequency that can otherwise degrade line cycle rejection. As shown in the plots, the best 50-Hz or 60-Hz rejection is provided by the sinc4 order, but has longer filter latency compared to the sinc1 order.
The overall sinc filter frequency has a low-pass response that rolls off high-frequency components in the signal. The signal bandwidth depends on the output data rate and the order of the sinc filter. Note the overall system bandwidth is the combination of the digital filter, the antialias filter, and external filter components. Table 9-4 lists the –3-dB filter bandwidth of the sinc filter. Note the bandwidth reduction of the higher-order sinc filters.
|DATA RATE (SPS)||-3-dB BANDWIDTH (Hz)|