SBAS661C February   2015  – May 2021 ADS1262 , ADS1263

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: Serial Interface
    7. 7.7 Switching Characteristics: Serial Interface
    8. 7.8 Timing Diagrams
    9. 7.9 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Offset Temperature Drift Measurement
    2. 8.2 Gain Temperature Drift Measurement
    3. 8.3 Common-Mode Rejection Ratio Measurement
    4. 8.4 Power-Supply Rejection Ratio Measurement
    5. 8.5 Crosstalk Measurement (ADS1263)
    6. 8.6 Reference-Voltage Temperature-Drift Measurement
    7. 8.7 Reference-Voltage Thermal-Hysteresis Measurement
    8. 8.8 Noise Performance
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Multifunction Analog Inputs
      2. 9.3.2  Analog Input Description
        1. 9.3.2.1 ESD Diode
        2. 9.3.2.2 Input Multiplexer
      3. 9.3.3  Sensor Bias
      4. 9.3.4  Temperature Sensor
      5. 9.3.5  Power-Supply Monitor
      6. 9.3.6  PGA
      7. 9.3.7  PGA Voltage Overrange Monitors
        1. 9.3.7.1 PGA Differential Output Monitor
        2. 9.3.7.2 PGA Absolute Output-Voltage Monitor
      8. 9.3.8  ADC Reference Voltage
        1. 9.3.8.1 Internal Reference
        2. 9.3.8.2 External Reference
        3. 9.3.8.3 Power-Supply Reference
        4. 9.3.8.4 Low-Reference Monitor
      9. 9.3.9  ADC1 Modulator
      10. 9.3.10 Digital Filter
        1. 9.3.10.1 Sinc Filter Mode
          1. 9.3.10.1.1 Sinc Filter Frequency Response
        2. 9.3.10.2 FIR Filter
        3. 9.3.10.3 50-Hz and 60-Hz Line Cycle Rejection
      11. 9.3.11 Sensor-Excitation Current Sources (IDAC1 and IDAC2)
      12. 9.3.12 Level-Shift Voltage
      13. 9.3.13 General-Purpose Input/Output (GPIO)
      14. 9.3.14 Test DAC (TDAC)
      15. 9.3.15 ADC2 (ADS1263)
        1. 9.3.15.1 ADC2 Inputs
        2. 9.3.15.2 ADC2 PGA
        3. 9.3.15.3 ADC2 Reference
        4. 9.3.15.4 ADC2 Modulator
        5. 9.3.15.5 ADC2 Digital Filter
    4. 9.4 Device Functional Modes
      1. 9.4.1  Conversion Control
        1. 9.4.1.1 Continuous Conversion Mode
        2. 9.4.1.2 Pulse Conversion Mode
        3. 9.4.1.3 ADC2 Conversion Control (ADS1263)
      2. 9.4.2  Conversion Latency
      3. 9.4.3  Programmable Time Delay
      4. 9.4.4  Serial Interface
        1. 9.4.4.1 Chip Select (CS)
        2. 9.4.4.2 Serial Clock (SCLK)
        3. 9.4.4.3 Data Input (DIN)
        4. 9.4.4.4 Data Output/Data Ready (DOUT/DRDY)
        5. 9.4.4.5 Serial Interface Autoreset
      5. 9.4.5  Data Ready Pin (DRDY)
      6. 9.4.6  Conversion Data Software Polling
      7. 9.4.7  Read Conversion Data
        1. 9.4.7.1 Read Data Direct (ADC1 Only)
        2. 9.4.7.2 Read Data by Command
        3. 9.4.7.3 Data-Byte Sequence
          1. 9.4.7.3.1 Status Byte
          2. 9.4.7.3.2 Data Byte Format
          3. 9.4.7.3.3 Checksum Byte (CRC/CHK)
            1. 9.4.7.3.3.1 Checksum Mode (CRC[1:0] = 01h)
          4. 9.4.7.3.4 CRC Mode (CRC[1:0] = 10h)
      8. 9.4.8  ADC Clock Modes
        1. 9.4.8.1 Internal Oscillator
        2. 9.4.8.2 External Clock
        3. 9.4.8.3 Crystal Oscillator
      9. 9.4.9  Calibration
        1. 9.4.9.1 Offset and Full-Scale Calibration
          1. 9.4.9.1.1 Offset Calibration Registers
          2. 9.4.9.1.2 Full-Scale Calibration Registers
        2. 9.4.9.2 ADC1 Offset Self-Calibration (SFOCAL1)
        3. 9.4.9.3 ADC1 Offset System Calibration (SYOCAL1)
        4. 9.4.9.4 ADC2 Offset Self-Calibration ADC2 (SFOCAL2)
        5. 9.4.9.5 ADC2 Offset System Calibration ADC2 (SYOCAL2)
        6. 9.4.9.6 ADC1 Full-Scale System Calibration (SYGCAL1)
        7. 9.4.9.7 ADC2 Full-Scale System Calibration ADC2 (SYGCAL2)
        8. 9.4.9.8 Calibration Command Procedure
        9. 9.4.9.9 User Calibration Procedure
      10. 9.4.10 Reset
        1. 9.4.10.1 Power-On Reset (POR)
        2. 9.4.10.2 RESET/PWDN Pin
        3. 9.4.10.3 Reset by Command
      11. 9.4.11 Power-Down Mode
      12. 9.4.12 Chop Mode
    5. 9.5 Programming
      1. 9.5.1 NOP Command
      2. 9.5.2 RESET Command
      3. 9.5.3 START1, STOP1, START2, STOP2 Commands
      4. 9.5.4 RDATA1, RDATA2 Commands
      5. 9.5.5 SYOCAL1, SYGCAL1, SFOCAL1, SYOCAL2, SYGCAL2, SFOCAL2 Commands
      6. 9.5.6 RREG Command
      7. 9.5.7 WREG Command
    6. 9.6 Register Maps
      1. 9.6.1  Device Identification Register (address = 00h) [reset = x]
      2. 9.6.2  Power Register (address = 01h) [reset = 11h]
      3. 9.6.3  Interface Register (address = 02h) [reset = 05h]
      4. 9.6.4  Mode0 Register (address = 03h) [reset = 00h]
      5. 9.6.5  Mode1 Register (address = 04h) [reset = 80h]
      6. 9.6.6  Mode2 Register (address = 05h) [reset = 04h]
      7. 9.6.7  Input Multiplexer Register (address = 06h) [reset = 01h]
      8. 9.6.8  Offset Calibration Registers (address = 07h, 08h, 09h) [reset = 00h, 00h, 00h]
      9. 9.6.9  Full-Scale Calibration Registers (address = 0Ah, 0Bh, 0Ch) [reset = 40h, 00h, 00h]
      10. 9.6.10 IDACMUX Register (address = 0Dh) [reset = BBh]
      11. 9.6.11 IDACMAG Register (address = 0Eh) [reset = 00h]
      12. 9.6.12 REFMUX Register (address = 0Fh) [reset = 00h]
      13. 9.6.13 TDACP Control Register (address = 10h) [reset = 00h]
      14. 9.6.14 TDACN Control Register (address = 11h) [reset = 00h]
      15. 9.6.15 GPIO Connection Register (address = 12h) [reset = 00h]
      16. 9.6.16 GPIO Direction Register (address = 13h) [reset = 00h]
      17. 9.6.17 GPIO Data Register (address = 14h) [reset = 00h]
      18. 9.6.18 ADC2 Configuration Register (address = 15h) [reset = 00h]
      19. 9.6.19 ADC2 Input Multiplexer Register (address = 16h) [reset = 01h]
      20. 9.6.20 ADC2 Offset Calibration Registers (address = 17h, 18h) [reset = 00h, 00h]
      21. 9.6.21 ADC2 Full-Scale Calibration Registers (address = 19h, 1Ah) [reset = 00h, 40h]
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Isolated (or Floated) Inputs
      2. 10.1.2 Single-Ended Measurements
      3. 10.1.3 Differential Measurements
      4. 10.1.4 Input Range
      5. 10.1.5 Input Filtering
        1. 10.1.5.1 Aliasing
      6. 10.1.6 Input Overload
      7. 10.1.7 Unused Inputs and Outputs
      8. 10.1.8 Voltage Reference
      9. 10.1.9 Serial Interface Connections
    2. 10.2 Typical Application
      1. 10.2.1 3-Wire RTD Measurement with Lead-Wire Compensation
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
    3. 10.3 What To Do and What Not To Do
    4. 10.4 Initialization Setup
  11. 11Power Supply Recommendations
    1. 11.1 Power-Supply Decoupling
    2. 11.2 Analog Power-Supply Clamp
    3. 11.3 Power-Supply Sequencing
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VAVDD = 5 V, VAVSS = 0 V, VDVDD = 3.3 V, VREF = 2.5 V, and fCLK = 7.3728 MHz (unless otherwise noted); typical ADC1 characteristics at data rate = 20 SPS and gain = 1; typical ADC2 characteristics at data rate = 10 SPS and gain = 1

GUID-B4D536C4-A48E-4321-8034-71D53A846992-low.gif
After offset calibration, shorted inputs
Figure 7-4 ADC1 Offset Voltage vs Temperature
GUID-7CDB4677-62F6-4D01-B9F4-4F51F116169E-low.gif
Shorted inputs, 30 units
Figure 7-6 ADC1 Offset Voltage vs Temperature Distribution
GUID-E49F98B3-89EE-40A8-B0CC-74EE82EF86A4-low.gif
Shorted inputs
Figure 7-8 ADC1 Offset Voltage vs Reference Voltage
GUID-4097C61F-5075-4B68-B8BE-F5F72572F9BE-low.gif
30 units
Figure 7-10 ADC1 Gain vs Temperature Distribution
GUID-12FA1A0F-7260-471C-9C53-3D0EFD7899E9-low.gif
20 SPS, sinc4
Figure 7-12 ADC1 Noise vs Temperature
GUID-C1CE8403-074E-43C2-96D5-81D442D815C1-low.gif
20 SPS, 400 SPS, 7200 SPS = sinc4, 38400 SPS = sinc5
 
Figure 7-14 ADC1 Noise vs Reference Voltage
GUID-9401E753-83B4-4882-A8C6-3621415C2F28-low.gif
20 SPS, FIR filter, gain = 32, after offset calibration,
256 samples
Figure 7-16 ADC1 Output Reading Distribution
GUID-D6D6A2C3-CEF8-4934-A972-B3D17BD978D2-low.gif
7200 SPS, sinc4 filter, gain = 32, after offset calibration,
8192 samples
Figure 7-18 ADC1 Output Reading Distribution
GUID-112645E3-8AE9-4379-B9BA-7456C0DB0744-low.gif
38400 SPS, 8192 points
Figure 7-20 ADC1 Output Spectrum
GUID-2E9E615F-C91D-45B9-B43A-124DF415F6C2-low.gif
 
Figure 7-22 ADC1 INL vs Temperature
GUID-10404A58-88A0-4A54-8669-5FA9D1D413B4-low.gif
 
Figure 7-24 ADC1 INL vs Reference Voltage
GUID-F71A163E-E6C6-4DD5-A769-F6C5414A287E-low.gif
PGA bypassed
Figure 7-26 ADC1 Absolute Input Current
GUID-AB4C46A5-953C-431C-9D3D-DC9A26FE4D25-low.gif
Gain = 16, 32
Figure 7-28 ADC1 Absolute Input Current
GUID-DBA5F2BC-E590-4118-A9E4-4D0A84364738-low.gif
Gain = 16, 32
Figure 7-30 ADC1 Differential Input Current
GUID-8BD6AC44-78B3-4B15-8227-8E63BCBB3C20-low.gif
TA = 85°C, 30 units
Figure 7-32 Voltage Reference Long-Term Drift
GUID-C680FE90-6CFB-43A7-AA4D-C775712B2E07-low.gif
IREFP measured with VREFN = VAVSS, IREFN measured with VREFP = VAVDD
Figure 7-34 ADC1 Reference Input Current
GUID-10CCFF46-8877-4E64-A3A9-59C82C4C639A-low.gif
 
Figure 7-36 ADC1 PSRR vs Frequency
GUID-73D1E623-D52D-45E4-8EA6-E5B5EF8E4406-low.gif
IIDAC = 250 μA
Figure 7-38 IDAC Error vs Compliance Voltage
GUID-43B6CF6A-2B00-46E1-B97F-F88038E8AD3A-low.gif
IIDAC = 3000 μA
Figure 7-40 IDAC Error vs Compliance Voltage
GUID-A9C9AAA2-B497-4A3C-BA26-D3365F48C58E-low.gif
30 units
Figure 7-42 Temperature Sensor Voltage vs Temperature
GUID-B0C4357A-CBCD-4301-B381-7DE828E09379-low.gif
30 units
Figure 7-44 Internal Oscillator Frequency vs Temperature
GUID-FED432CE-C007-4EDB-9982-0BE84150D63F-low.gif
30 units
Figure 7-46 ADC1 Differential Over-range Alarm Threshold vs Temperature
GUID-6774DD76-F63E-44CD-AC3B-188EC0A9F925-low.gif
30 units
Figure 7-48 ADC1 Absolute High Alarm Threshold vs Temperature
GUID-ADAF622E-E576-4856-A683-092C08E28EBF-low.gif
After offset calibration, shorted input
Figure 7-50 ADC2 Offset Voltage vs Temperature
GUID-230FC419-48EC-4D34-88DA-56D5A8339A8D-low.gif
After gain calibration
Figure 7-52 ADC2 Gain vs Temperature
GUID-C32CFA0B-7633-4FFE-811C-D36D14891DE1-low.gif
Gain = 1, 10 SPS, after offset calibration, 128 samples
Figure 7-54 ADC2 Output Reading Distribution
GUID-5BB7B778-F42B-479A-A6DB-049DF8BBD9FD-low.gif
 
Figure 7-56 ADC2 INL vs VIN
GUID-6D62B7BC-525F-4DCA-AD8F-BFBB0E30A366-low.gif
10 SPS
Figure 7-58 ADC2 Noise vs Temperature
GUID-EF000377-1151-4093-9DAF-02F2049ECCF4-low.gif
Gain = 1, 4
Figure 7-60 ADC2 Absolute Input Current
GUID-A73FFAC4-FD21-4F31-8A27-4E208268E2CC-low.gif
Gain = 1, 4
Figure 7-62 ADC2 Differential Input Current
GUID-A58CC2D8-E5DD-4388-B3C4-83B560C0A04B-low.gif
 
 
Figure 7-64 ADC2 CMRR vs Frequency
GUID-E67C53C4-6331-4B60-8C6E-F65141C61D1D-low.gif
Chop mode on, after offset calibration, shorted inputs
Figure 7-5 ADC1 Offset Voltage vs Temperature
GUID-C0E63FD2-94E4-4C36-94C0-1CE9E4026A25-low.gif
Chop mode on, shorted inputs, 30 units
Figure 7-7 ADC1 Offset Voltage vs Temperature Distribution
GUID-3694DCCE-4DE3-4DC1-9238-2B5322540A31-low.gif
After gain calibration
Figure 7-9 ADC1 Gain Error vs Temperature
GUID-33E0D5C4-EB64-40BE-AB4F-AA2F4A371E3D-low.gif
 
Figure 7-11 ADC1 Gain Error vs Reference Voltage
GUID-BC7E5F3B-E7B9-4D1D-B543-E70332424B2E-low.gif
7200 SPS, sinc4
Figure 7-13 ADC1 Noise vs Temperature
GUID-24A0637A-25F5-4DF2-9412-8915DCE61856-low.gif
20 SPS, FIR filter, gain = 1, after offset calibration,
256 samples
Figure 7-15 ADC1 Output Reading Distribution
GUID-AD220433-9425-4C2A-A61C-85A34E716AD0-low.gif
7200 SPS, sinc4 filter, gain = 1, after offset calibration,
8192 samples
Figure 7-17 ADC1 Output Reading Distribution
GUID-D0AACFE2-46F8-4EDC-8F21-9D5027BE5BB9-low.gif
20 SPS, gain = 1, 256 points
 
Figure 7-19 ADC1 Output Spectrum
GUID-2B7E456F-990C-4236-8E82-EC3F2DDE2BED-low.gif
 
Figure 7-21 ADC1 INL vs VIN
GUID-02BE4D4A-584C-4EFE-B3E7-44D0DFDD4E21-low.gif
Gain = 32, 30 units
Figure 7-23 ADC1 INL Distribution
GUID-9D626733-30B5-4335-BFAB-07D7B4FBAB22-low.gif
PGA bypassed
Figure 7-25 ADC1 Differential Input Current
GUID-3647501B-00F7-43FA-8D89-41AA59302FA0-low.gif
Gain = 1, 4
Figure 7-27 ADC1 Absolute Input Current
GUID-4ECC8FF8-27F1-474F-A976-AB256347DC82-low.gif
Gain = 1, 4
Figure 7-29 ADC1 Differential Input Current
GUID-31BFE3C5-B5D5-4227-947A-4A0CBD99A90E-low.gif
30 units
Figure 7-31 Voltage Reference vs Temperature
GUID-1A91AA01-453E-470C-9253-CE2F5D6FA5D2-low.gif
 
Figure 7-33 Voltage Reference Start-Up Time
GUID-C985CBFA-6DFE-4281-93A4-4A00C38DC148-low.gif
 
 
Figure 7-35 ADC1 CMRR vs Frequency
GUID-3D196194-99AA-4403-B37D-EF895F8A13A6-low.gif
 
Figure 7-37 ADC1 CMRR, PSRR vs Temperature
GUID-D0AA06A7-8ECE-4D13-94DD-05249DED7C87-low.gif
IIDAC = 1000 μA
Figure 7-39 IDAC Error vs Compliance Voltage
GUID-AA96F4D5-DCFD-4ED6-B074-B70024A2CCAD-low.gif
IIDAC1= IIDAC2 = 250 μA
Figure 7-41 IDAC Current Error vs Compliance Voltage
GUID-06B9B895-E17F-42B5-B7F9-850016655362-low.gif
TA = 25°C, 30 units
Figure 7-43 Temperature Sensor Voltage Distribution
GUID-6FD450D9-B7B1-40A4-8CF5-D01D569CCC57-low.gif
 
Figure 7-45 ADS1262 Active Current vs Temperature
GUID-E09E68C3-9943-4CD8-BB0C-4888AEFAAC4B-low.gif
30 units
Figure 7-47 ADC1 Absolute Low Alarm Threshold vs Temperature
GUID-793BC2A1-A953-4C16-8F1E-130C72A9E0EA-low.gif
 
Figure 7-49 TDAC Error vs Temperature
GUID-10E69CC3-FE81-4E60-8951-5505CC53635A-low.gif
Inputs shorted, 30 units
Figure 7-51 ADC2 Offset Voltage vs Temperature Distribution
GUID-D484A773-6F4B-42B0-BF79-0B28004D38DA-low.gif
30 units
Figure 7-53 ADC2 Gain vs Temperature Distribution
GUID-1F25F34A-3117-4F62-9A85-9218191375D2-low.gif
Gain = 128, 10 SPS, after offset calibration, 128 samples
Figure 7-55 ADC2 Output Reading Distribution
GUID-5DC56D66-DAC1-4676-BA88-E2737DA9B64F-low.gif
 
Figure 7-57 ADC2 INL vs Temperature
GUID-66AE3FCB-CD81-4CD1-8151-E7356C767A2B-low.gif
 
Figure 7-59 ADC2 Noise vs Reference Voltage
GUID-EB14A0AB-522C-4136-8661-16F3E2A9BEF4-low.gif
Gain = 16, 64
Figure 7-61 ADC2 Absolute Input Current
GUID-A5BFBBD4-A2E5-4DBC-BA21-60E8DB0C7BA9-low.gif
Gain = 16, 64
Figure 7-63 ADC2 Differential Input Current
GUID-E7AC863F-925B-420B-A50B-073E8F366547-low.gif
IREFP measured with VREFN = VAVSS, IREFN measured with VREFP = VAVDD
Figure 7-65 ADC2 Reference Input Current