The digital filter of ADC1 receives the modulator output data and produces a high-resolution conversion result. The digital filter low-pass filters and decimates the modulator data (rate reduction), yielding the final data output. By adjusting the type of filtering, tradeoffs are made between resolution, data rate, line cycle rejection, and conversion latency.
The digital filter has two selectable modes: sin (x) / x (sinc) mode and finite impulse response (FIR) mode (see Figure 9-13). The sinc mode provides data rates of 2.5 SPS though 38400 SPS with selectable sinc orders of 1 through 5. The FIR filter provides simultaneous rejection of 50-Hz and 60-Hz power-line frequencies with data rates 2.5 SPS through 20 SPS with single-cycle settled conversions.