SBAS949A February 2020 – February 2021 ADS131M06
The nominal voltage from the mains is from 100 V – 240 V so this voltage must be scaled down to be sensed by an ADC. Figure 9-6 shows the analog front-end used for this voltage scaling.
The analog front-end for voltage consists of a spike protection varistor (RV), a voltage divider network (RHI and RLO), and an RC low-pass filter (RFILT and CFILT).
Equation 11 shows how to calculate the range of differential voltages fed to the voltage ADC channel for a given mains voltage and the selected voltage divider resistor values.
RHI is 300 kΩ and RLO is 750 Ω in this design. For a mains voltage of 240 V (as measured between the line and neutral), the input signal to the voltage ADC has a voltage swing of ±256 mV (182 mVRMS) based on Equation 11 and the selected resistor values. This voltage is well within the ±1.2-V input voltage range that can be sensed by the ADS131M06 for the selected PGA gain value of 1 that is used for the voltage channels.