There is a latency of one cycle when switching channels using the register access, just as in manual mode. The newly selected channel data are available two cycles after selecting the desired channel. The ADS816x supports on-the-fly switching of the analog input channels of the multiplexer. This mode can be enabled by programming the SEQ_MODE[1:0] bits to 01b in the DEVICE_CFG register. When enabled, the analog input channel for the next conversion is determined by the first five bits sent over SDI. The desired analog input channel can be selected by setting the MSB to 1 and the following four bits as the channel ID. If the MSB is 0 then the SDI bitstream is decoded as a normal frame on the rising edge of CS. Table 3 lists the channel selection commands for this mode.
|SDI BITS [15:11]||SDI BITS [10:0]||DESCRIPTION|
|1 0000||Don't care||Select analog input 0|
|1 0001||Don't care||Select analog input 1|
|1 0010||Don't care||Select analog input 2|
|1 0011||Don't care||Select analog input 3|
|1 0100||Don't care||Select analog input 4|
|1 0101||Don't care||Select analog input 5|
|1 0110||Don't care||Select analog input 6|
|1 0111||Don't care||Select analog input 7|
|1 1000 to 1 1111||Don't care||Error bit is set; select analog input 0|
To set the device in on-the-fly mode, configure EN_ON_THE_FLY to 1b in the ON_THE_FLY_CFG register as shown in Figure 44 using a 3-byte register access. When in this mode, the 16-bit data transfer can be used to reduce the required clock speed for operating at full throughput.
After selecting AINy, as shown in Figure 45, the output of the multiplexer does not create a charge kickback as long as SDI is set to 0 (that is, as long as SDI returns the NOP command). Thus, high-impedance sources such as the voltage from resistor dividers can be connected to the analog inputs of the multiplexer without an op amp.