SBAS905C November 2019 – July 2020 ADS8686S
PRODUCTION DATA
The ADS8686S supports on-chip register access in software mode. A single register write command is performed by a single 16-bit parallel access through the parallel bus (DB15 to DB0), CS, and WR signals. The 16-bit data to be fed on the DB[15:0] pins is determined by the register to be addressed and the device settings needed for the application. See the Section 7.6 section to determine the register content. Pull the CS pin low to take the DB[15:0] pins out of high-impedance state. Pull the WR pin low to configure the DB[15:0] pins as digital inputs. The host drives the DB[15:0] pins with the data to program the on-chip register. When the register is programmed, pull the WR pin high. Data are latched into the device on the rising edge of WR. Figure 7-24 shows the parallel register write timing diagram.