SBASA81A January   2023  – December 2023 ADS9815 , ADS9817

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Timing Diagrams
    9. 5.9 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Inputs
        1. 6.3.1.1 Input Clamp Protection Circuit
        2. 6.3.1.2 Programmable Gain Amplifier (PGA)
        3. 6.3.1.3 Wide-Common-Mode Voltage Rejection Circuit
        4. 6.3.1.4 Gain Error Calibration
      2. 6.3.2 ADC Transfer Function
      3. 6.3.3 ADC Sampling Clock Input
      4. 6.3.4 Reference
        1. 6.3.4.1 Internal Reference Voltage
        2. 6.3.4.2 External Reference Voltage
      5. 6.3.5 Sample Synchronization
      6. 6.3.6 Data Interface
        1. 6.3.6.1 Data Clock Output
        2. 6.3.6.2 ADC Output Data Randomizer
        3. 6.3.6.3 Test Patterns for Data Interface
          1. 6.3.6.3.1 User-Defined Test Pattern
          2. 6.3.6.3.2 User-Defined Alternating Test Pattern
          3. 6.3.6.3.3 Ramp Test Pattern
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power-Down
      2. 6.4.2 Reset
      3. 6.4.3 Initialization Sequence
      4. 6.4.4 Normal Operation
    5. 6.5 Programming
      1. 6.5.1 Register Write
      2. 6.5.2 Register Read
      3. 6.5.3 Multiple Devices: Daisy-Chain Topology for SPI Configuration
        1. 6.5.3.1 Register Write With Daisy-Chain
        2. 6.5.3.2 Register Read With Daisy-Chain
  8. Register Map
    1. 7.1 Register Bank 0
    2. 7.2 Register Bank 1
    3. 7.3 Register Bank 2
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Data Acquisition (DAQ) System
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 CMOS Data Interface
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

GUID-20230802-SS0I-0XPM-V035-WSMT1S039LTL-low.svg
Typical INL = ±0.75 LSB
Figure 5-6 Typical INL With Low-Bandwidth LPF
GUID-20230802-SS0I-3MB1-BRCG-TWPVW4HXFMW8-low.svg
Typical DNL = ±0.2 LSB
Figure 5-8 Typical DNL With Low-Noise LPF
GUID-20230816-SS0I-2WFF-FMV9-GC8GHXTHFD10-low.svg
SNR = 91.5 dBFS, THD = –113 dB at fIN = 2 kHz
Figure 5-10 Typical FFT With Low-Bandwidth LPF,
RANGE = ±5 V
GUID-20230816-SS0I-BKNH-GTFB-7NCK721VSRTQ-low.svg
SNR = 92.1 dBFS, THD = –113 dB at fIN = 2 kHz
Figure 5-12 Typical FFT With Low-Bandwidth LPF,
RANGE = ±10 V
GUID-20221027-SS0I-QW3P-CMKF-0L5PJPBPDW6T-low.svg
Typical bandwidth (–3 dB) = 21.2 kHz
Figure 5-14 Low-Bandwidth LPF Frequency Response Across Input Ranges
GUID-20230804-SS0I-C461-KDXS-V1HKVHJP0SCR-low.svg
 
Figure 5-16 SNR vs Input Signal Frequency Across Input Ranges With Low-Bandwidth LPF
GUID-20230804-SS0I-PLQG-9H3F-7SFFMNNJ84MJ-low.svg
 
Figure 5-18 THD vs Input Signal Frequency Across Input Ranges With Low-Bandwidth LPF
GUID-20230804-SS0I-87NM-ZK7Z-CXXLHKCZPZDX-low.svg
 
Figure 5-20 SINAD vs Input Signal Frequency Across Input Ranges With Low-Bandwidth LPF
GUID-20230907-SS0I-XZKM-XZ7J-GKGFHPR57FC2-low.svg
 
Figure 5-22 THD vs Input Frequency, Low-BW Mode,
RANGE = ±5 V, ADS9817
GUID-20230907-SS0I-RPSJ-TJPP-F7L3VJLSMJH1-low.svg
 
Figure 5-24 THD vs Input Frequency, Low-BW Mode,
RANGE = ±10 V, ADS9817
GUID-20230907-SS0I-ZDRB-LSX8-4NT5HWQHDNZ9-low.svg
 
Figure 5-26 THD vs Input Frequency, Low-BW Mode,
RANGE = ±5 V, ADS9815
GUID-20230907-SS0I-TTG2-VLP5-JJJSW7S1FJRZ-low.svg
 
Figure 5-28 THD vs Input Frequency, Low-BW Mode,
RANGE = ±10 V, ADS9815
GUID-20231103-SS0I-0FMX-ZHPV-G9HD9GFKRPXC-low.svg
 
 
Figure 5-30 THD vs Input Amplitude, RANGE = ±5 V
GUID-20230717-SS0I-HVZK-QRJ7-K4KRVFT0WZP8-low.svg
 
Figure 5-32 INL vs Temperature
GUID-20230807-SS0I-4XWW-BXBT-VZ8DTFQ8QQCJ-low.svg
 
Figure 5-34 Offset Error vs Temperature, RANGE = ±5 V
GUID-20230804-SS0I-3MR5-4CB9-2FRVNNRF5L9H-low.svg
 
Figure 5-36 Offset Error Drift Histogram
GUID-20230807-SS0I-1GR6-RZ0B-R14HJ17N8HVQ-low.svg
 
Figure 5-38 Gain Error vs Temperature, RANGE = ±10 V
GUID-20231103-SS0I-3WGC-2XDB-RPD0446M4CQX-low.svg
Mean = 131073.8 LSB, standard deviation = 2.45 LSB, number of hits = 4096
Figure 5-40 DC Histogram of Codes for AINxP = AINxM = GND, Low-BW Mode, RANGE = ±5 V
GUID-20231103-SS0I-RZ1L-DVMX-GZTT7N608BCN-low.svg
Mean = 131074.4 LSB, standard deviation = 5.47 LSB, number of hits = 4096
Figure 5-42 DC Histogram of Codes for AINxP = AINxM = GND, Wide-BW Mode, RANGE = ±5 V
GUID-20230816-SS0I-137D-0RBV-ZQRD0DTF89H9-low.svg
 
Figure 5-44 REFIO vs Temperature
GUID-20230804-SS0I-LH1X-FGKB-0DBB8T2PNXL1-low.svg
 
Figure 5-46 Supply Currents and Total Power Dissipation vs Temperature
GUID-20230802-SS0I-S503-LXDX-TKHMMPHXZ6WW-low.svg
Typical INL = ±0.75 LSB
Figure 5-7 Typical INL With Wide-Bandwidth LPF
GUID-20230802-SS0I-NVRM-8SCC-NV8STVJTFT9J-low.svg
Typical DNL = ±0.25 LSB
Figure 5-9 Typical DNL With Wide-Bandwidth LPF
GUID-20230816-SS0I-L5X5-2SXQ-LVCKPFBB6RWB-low.svg
SNR = 83.7 dBFS, THD = –113 dB at fIN = 2 kHz
Figure 5-11 Typical FFT With Wide-Bandwidth LPF,
RANGE = ±5 V
GUID-20230816-SS0I-C0HV-ZGQH-TXRZSGHKNWCT-low.svg
SNR = 85.5 dBFS, THD = –113 dB at fIN = 2 kHz
Figure 5-13 Typical FFT With Wide-Bandwidth LPF,
RANGE = ±10 V
GUID-20221027-SS0I-ZCLT-FQFQ-N2DWHGJXD9G9-low.svg
 
Figure 5-15 Wide-Bandwidth LPF Frequency Response Across Input Ranges
GUID-20230804-SS0I-CTQK-WCS3-1TPF3LK4BNW6-low.svg
 
Figure 5-17 SNR vs Input Signal Frequency Across Input Ranges With Wide-Bandwidth LPF
GUID-20230804-SS0I-ZTPQ-DSXH-TXJX2JLHCSBS-low.svg
 
Figure 5-19 THD vs Input Signal Frequency Across Input Ranges With Wide-Bandwidth LPF
GUID-20230804-SS0I-XPRR-TBBG-FK4RVJFR9DHC-low.svg
 
Figure 5-21 SINAD vs Input Signal Frequency Across Input Ranges With Wide-Bandwidth LPF
GUID-20230907-SS0I-XX0R-TLQX-DPHFV0ZFZRT4-low.svg
 
Figure 5-23 THD vs Input Frequency, High-BW Mode,
RANGE = ±5 V, ADS9817
GUID-20230907-SS0I-NKP4-BXDK-CPKTRWR2FVJ3-low.svg
 
Figure 5-25 THD vs Input Frequency, High-BW Mode,
RANGE = ±10 V, ADS9817
GUID-20230907-SS0I-K4NN-STKZ-3HPTFVTXWPBK-low.svg
 
Figure 5-27 THD vs Input Frequency, High-BW Mode,
RANGE = ±5 V, ADS9815
GUID-20230907-SS0I-SCWH-VWQP-0D9Z62KLHCZZ-low.svg
 
Figure 5-29 THD vs Input Frequency, High-BW Mode,
RANGE = ±10 V, ADS9815
GUID-20231103-SS0I-Z1KP-DXCX-ZXRPBRMHFX5D-low.svg
Input level = 0 dB; RIN = 0 Ω, 50 Ω, 1 kΩ, 10 kΩ, 50 kΩ, fIN = 40 Hz, 110 Hz, 1 kHz, 2 kHz, 10 kHz, 15 kHz, 24 kHz
Figure 5-31 THD vs Input Amplitude, RANGE = ±10 V
GUID-20230717-SS0I-D6JV-4SQS-1DRF1NWNLMV8-low.svg
 
Figure 5-33 DNL vs Temperature
GUID-20230807-SS0I-XRZ7-NBQ6-LXKGDFN3W9DX-low.svg
 
Figure 5-35 Offset Error vs Temperature, RANGE = ±10 V
GUID-20230807-SS0I-HKZC-X2RD-LGHTXVZRSVL1-low.svg
 
Figure 5-37 Gain Error vs Temperature, RANGE = ±5 V
GUID-20230804-SS0I-KJ42-DV2T-9GZMJ2PWZJ7H-low.svg
 
Figure 5-39 Gain Error Drift Histogram
GUID-20231103-SS0I-LW9L-2FLC-RCPJ6NXGP1B7-low.svg
Mean = 131103.5 LSB, standard deviation = 2.49 LSB, number of hits = 4096
Figure 5-41 DC Histogram of Codes for VIN = 1 mV, Low-BW Mode, RANGE = ±5 V
GUID-20231103-SS0I-20VF-9TZB-RX3717082KTL-low.svg
Mean = 131102.3 LSB, standard deviation = 5.68 LSB, number of hits = 4096
Figure 5-43 DC Histogram of Codes for VIN = 1 mV, Wide-BW Mode, RANGE = ±5 V
GUID-20230816-SS0I-TH51-LHC7-X9LHW3BCFP6T-low.svg
 
Figure 5-45 REFOUT_2V5 vs Temperature