SBAS667F April   2016  – April 2020 AMC1301

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics
    10. 7.10 Insulation Characteristics Curves
    11. 7.11 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Timing Diagrams
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Analog Input
      2. 9.3.2 Fail-Safe Output
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Frequency Inverter Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Isolated Voltage Sensing
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curve
    3. 10.3 What To Do and What Not TO Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C (for AMC1301S: TA = –55°C to +125°C), VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, VINP = –250 mV to +250 mV, and VINN = 0 V (unless otherwise noted); typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
VClipping Differential input voltage before clipping output VINP – VINN ±302.7 mV
VFSR Specified linear differential full-scale VINP – VINN –250 250 mV
VCM Specified common-mode input voltage (VINP + VINN) / 2 to GND1 –0.16 VDD1 – 2.1 V
Absolute common-mode input voltage(1) (VINN + VINP) / 2 to GND1 –2 VDD1 V
VCMov Common-mode overvoltage detection level VDD1 – 2 V
VOS Input offset voltage Initial, at TA = 25°C, VINP = VINN = GND1 –200 ±50 200 µV
TCVOS Input offset drift AMC1301 –3 ±1 3 µV/°C
AMC1301S –4 ±1 4
CMRR Common-mode rejection ratio fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max –93 dB
fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max –93
CIND Differential input capacitance 1 pF
RIN Single-ended input resistance VINN = GND1 18 kΩ
RIND Differential input resistance 22 kΩ
IIB Input bias current VINP = VINN = GND1, IIB = (IIBP + IIBN ) / 2 –41 –30 –24 µA
TCIIB Input bias current drift 1 nA/°C
BWIN Input bandwidth 1000 kHz
ANALOG OUTPUT
Nominal gain 8.2
EG Gain error Initial, at TA = 25°C –0.3% ±0.05% 0.3%
TCEG Gain error drift AMC1301 –50 ±15 50 ppm/°C
AMC1301S –60 ±15 60
Nonlinearity –0.03% ±0.01% 0.03%
Nonlinearity drift 1 ppm/°C
THD Total harmonic distortion fIN = 10 kHz –87 dB
Output noise VINP = VINN = GND1, fIN = 0 Hz,
BW = 100 kHz
220 μVRMS
SNR Signal-to-noise ratio fIN = 1 kHz, BW = 10 kHz 80 84 dB
fIN = 10 kHz, BW = 100 kHz 71
PSRR Power-supply rejection ratio vs VDD1, at dc –94 dB
vs VDD1, 100-mV and 10-kHz ripple –90
vs VDD2, at dc –100
vs VDD2, 100-mV and 10-kHz ripple –94
tr Rise time See Figure 45 2.0 µs
tf Fall time See Figure 45 2.0 µs
VIN to VOUT signal delay (50% – 10%) See Figure 46, unfiltered output 0.7 2.0 µs
VIN to VOUT signal delay (50% – 50%) See Figure 46, unfiltered output 1.6 2.6 µs
VIN to VOUT signal delay (50% – 90%) See Figure 46, unfiltered output 2.5 3.0 µs
CMTI Common-mode transient immunity |GND1 – GND2| = 1 kV 15 kV/µs
VCMout Common-mode output voltage 1.39 1.44 1.49 V
Output short-circuit current ±13 mA
ROUT Output resistance on VOUTP or VOUTN < 0.2 Ω
BW Output bandwidth 190 210 kHz
VFAILSAFE Failsafe differential output voltage VCM ≥ VCMov, or VDD1 missing –2.563 –2.545 V
POWER SUPPLY
IDD1 High-side supply current 3.0 V ≤ VDD1 ≤ 3.6 V 5.0 6.9 mA
4.5 V ≤ VDD1 ≤ 5.5 V 5.9 8.3
IDD2 Low-side supply current 3.0 V ≤ VDD2 ≤ 3.6 V 4.4 5.6 mA
4.5 V ≤ VDD2 ≤ 5.5 V 4.8 6.5
PDD1 High-side power dissipation 3.0 V ≤ VDD1 ≤ 3.6 V 16.5 24.84 mW
4.5 V ≤ VDD1 ≤ 5.5 V 29.5 45.65
PDD2 Low-side power dissipation 3.0 V ≤ VDD2 ≤ 3.6 V 14.52 20.16 mW
4.5 V ≤ VDD2 ≤ 5.5 V 24 35.75
Steady-state voltage supported by the device in case of a system failure. See specified common-mode input voltage VCM for normal operation. Observe analog input voltage range as specified in Absolute Maximum Ratings.