SBAS771C June   2017  – February 2020 AMC1303E0510 , AMC1303E0520 , AMC1303E2510 , AMC1303E2520 , AMC1303M0510 , AMC1303M0520 , AMC1303M2510 , AMC1303M2520

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics: AMC1303x05x
    10. 7.10 Electrical Characteristics: AMC1303x25x
    11. 7.11 Switching Characteristics
    12. 7.12 Insulation Characteristics Curves
    13. 7.13 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
      2. 8.3.2 Modulator
      3. 8.3.3 Isolation Channel Signal Transmission
      4. 8.3.4 Digital Output
      5. 8.3.5 Manchester Coding Feature
    4. 8.4 Device Functional Modes
      1. 8.4.1 Fail-Safe Output
      2. 8.4.2 Output Behavior in Case of a Full-Scale Input
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Digital Filter Usage
    2. 9.2 Typical Applications
      1. 9.2.1 Frequency Inverter Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Isolated Voltage Sensing
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
      3. 9.2.3 What To Do and What Not To Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Isolation Glossary
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics: AMC1303x25x

minimum and maximum specifications apply from TA = –40°C to +125°C, AVDD = 3.0 V to 5.5 V, DVDD = 2.7 V to 5.5 V, AINP = –250 mV to 250 mV, AINN = AGND, and sinc3 filter with OSR = 256 (unless otherwise noted); typical specifications are at TA = 25°C, AVDD = 5 V, and DVDD = 3.3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUTS
VClipping  Differential input voltage before clipping output VIN = AINP – AINN ±320 mV
FSR Specified linear differential full-scale VIN = AINP – AINN –250 250 mV
Absolute common-mode input voltage(1) (AINP + AINN) / 2 to AGND –2 AVDD V
VCM  Operating common-mode input voltage (AINP + AINN) / 2 to AGND –0.16 AVDD – 2.1 V
VCMov Common-mode overvoltage detection level (AINP + AINN) / 2 to AGND AVDD – 2 V
Hysteresis of common-mode overvoltage detection level 90 mV
CIN  Single-ended input capacitance AINN = AGND 2 pF
CIND  Differential input capacitance 1 pF
RIN Single-ended input resistance AINN = AGND 19
RIND  Differential input resistance 22
IIB  Input bias current AINP = AINN = AGND, IIB = IIBP + IIBN –82 –60 –48 µA
IIO  Input offset current ±5 nA
CMTI Common-mode transient immunity 50 100 kV/µs
CMRR Common-mode rejection ratio AINP = AINN, fIN = 0 Hz,
VCM min ≤ VIN ≤ VCM max
–98 dB
AINP = AINN, fIN from 0.1 Hz to 50 kHz,
VCM min ≤ VIN ≤ VCM max
–98
PSRR Power-supply rejection ratio AINP = AINN = AGND, 3.0 V ≤ AVDD ≤ 5.5 V,
at dc
–97 dB
AINP = AINN = AGND, 3.0 V ≤ AVDD ≤ 5.5 V,
10-kHz, 100-mV ripple
–94.5
BW Input bandwidth(2) AMC1303x2510 510 kHz
AMC1303x2520 900
DC ACCURACY
DNL Differential nonlinearity Resolution: 16 bits –0.99 0.99 LSB
INL Integral nonlinearity(3) Resolution: 16 bits –4 ±1 4 LSB
EO  Offset error  Initial, at TA = 25°C, AINP = AINN = AGND –100 ±4.5 100 µV
TCEO  Offset error thermal drift(4) –1 ±0.15 1 μV/°C
EG  Gain error  Initial, at TA = 25°C –0.2% –0.005% 0.2%
TCEG  Gain error thermal drift(5) –40 ±20 40 ppm/°C
AC ACCURACY
SNR Signal-to-noise ratio AMC1303x2510, fIN = 35 Hz 85 87 dB
AMC1303x2520, fIN = 35 Hz 84.5 86.5
THD Total harmonic distortion AMC1303x2510, fIN = 35 Hz –97 –86 dB
AMC1303x2520, fIN = 35 Hz –101 –86
SFDR Spurious-free dynamic range fIN = 35 Hz 98 dB
DIGITAL OUTPUTS (CMOS LOGIC)
CLOAD Output load capacitance 30 pF
VOH High-level output voltage IOH = –20 µA DVDD – 0.1 V
IOH = –4 mA DVDD – 0.4
VOL Low-level output voltage IOL = 20 µA 0.1 V
IOL = 4 mA 0.4
POWER SUPPLY
IAVDD High-side supply current AMC1303x2510, 3.0 V ≤ AVDD ≤ 3.6 V 5.4 7.3 mA
AMC1303x2510, 4.5 V ≤ AVDD ≤ 5.5 V 6.0 8.0
AMC1303x2520, 3.0 V ≤ AVDD ≤ 3.6 V 6.3 8.5
AMC1303x2520, 4.5 V ≤ AVDD ≤ 5.5 V 7.2 9.8
IDVDD Controller-side supply current AMC1303E2510, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
3.3 4.5 mA
AMC1303E2510, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
3.6 5.0
AMC1303M2510, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
3.5 4.7
AMC1303M2510, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
3.9 5.4
AMC1303E2520, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
4.1 5.5
AMC1303E2520, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
4.7 6.5
AMC1303M2520, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
4.6 6.0
AMC1303M2520, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
5.4 7.2
Steady-state voltage supported by the device in case of a system failure. See the specified common-mode input voltage VCM for normal operation. Observe analog input voltage range as specified in the Absolute Maximum Ratings table.
This parameter is the –3-dB, second-order, roll-off frequency of the integrated differential input amplifier to consider for antialiasing filter designs.
Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer function expressed as number of LSBs or as a percent of the specified linear full-scale range FSR.
Offset error drift is calculated using the box method as described by the following equation: AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 ec_eodrift_bas654.gif.
Gain error drift is calculated using the box method as described by the following equation: AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 ec_egdrift_bas654.gif